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Full text of "westernElectric :: mac-8 :: PA-800515 MAC-8 TUTOR Jul79"

PA-800515 

Issue 2, July 1979 

AT&T Co Provisional 








1A MICROPROCESSOR 
TRAINING AID 

REFERENCE MANUAL 




Bell Laboratories 



NOTICE 



Not for use or disclosure outside the Bell 
System except under written agreement. 



Prepared and published fc^ the 

Microprocessor Systems Development Department 

by the 

Technical Documentation Department 

Bell Laboratories 

Printed in U.S.A. 



V/un 1 (.n 1 o 


PAGE 
NUMBER 


ISSUE NUMBER AND DATE 


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PAGE INDEX 

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FOREWORD, FRONT 
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CONTENTS 

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THE CONTENT OF THIS MATERIAL IS PROPRIETARY AND CONSTITUTES A TRADE SECRET- 
IT IS FURNISHED PURSUANT TO WRIHEN AGREEMENTS OR INSTRUCTIONS LIMITING THE 
EXTENT OF DISCLOSURE. ITS FURTHER DISCLOSURE IN ANY FORM WITHOUT THE WRITTEN 
PERMISSION OF ITS OWNER, BELL LABORATORIES, INCORPORATED, IS PROHIBITED. 


PAGE INDEX NOTES 


SUPPORTING INFORMATION 


1. WHEN CHANGES ARE MADE IN THIS 
DOCUMENT, ONLY THOSE PAGES AFFECTED 
WILL BE REISSUED. 

2. THIS PAGE INDEX WILL BE REISSUED 
AND BROUGHT UP TO DATE EACH TIME ANY 
PAGE OF THE DOCUMENT IS REISSUED, OR 
A NEW PAGE IS ADDED. 

3. THE ISSUE NUMBER ASSIGNED TO A 
CHANGED OR NEW PAGE WILL BE THE SAME 
ISSUE NUMBER AS THAT OF THE PAGE 
INDEX. 

4. PAGES THAT ARE NOT CHANGED WILL 
RETAIN THEIR EXISTING ISSUE NUMBER. 

5. THE LAST ISSUE NUMBER OF THE PAGE 
INDEX IS RECOGNIZED AS THE LATEST 
ISSUE NUMBER OF THE DOCUMENT AS A 
WHOLE. 


CATEGORY 


NUMBEI^ 






MAC TUTOR 


AT&T Co. 
Provisional 


(g) Bell Laboratories 


] 


^EF] 


iREI 


^CE 


MAI 


WA. 


L 




PA-8OO515-AI 





PAGE 
NUMBER 


ISSUE NUMBER 


CONTENTS 


1 


2 
























1. SYSTEM OVERVIEW 


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(S^ Bell Laboratories 


MAC-8 


ISSUE 

2 


PA-800515 
-A2 



CONTENTS 


PAGE 
NUMBER 


ISSUE NUMBER 


1 


2 
























CHAPTER 3 TITLE FAGE 
FRONT 
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3. MAC-8 ARCHITECTURE 

CHAPTER 4 TITLE PAGE 
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4. MAC-TUTOR SOFTWARE 

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(u) Bell Laboratories 


MAC-8 


ISSUE 

2 


PA-80051^ 
-A3 





PAGE 
NUMBER 


ISSUE NUMBER 


CONTENTS 


1 


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5. SOFTWARE 


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APPENDIX TITLE PAGE 
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APPENDIX, RESIDENT 
EXECUTIVE SOFTWARE 


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(S) Bell Laboratories 


1 


MAC-8 


ISSUE ] 

2 


:^A-800515 
-A4 



CONTENTS 


PAGE 
NUMBER 


ISSUE NUMBER 


1 


2 
























APPENDIX, Curil . 
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(Q^ Bell Laboratories 


MAC-8 


ISSUE I 

2 


=A-800515 
-A5 



PA-800515 Issue 2, July 1979 



FOREWORD 



MAC-Tutor has been coded by the Western Electric Company as the No. lA Microprocessor 
Training Aid (component code 103180717), but will be called MAC-Tutor throughout this 
manual. 

TU^ fnUr^,,,:r,r. .^^^..^i^ ««^ ,,u:_ ^ „.;+u tu^ m^ i a \4: 'r :_; a :j. 

X in^ njiiKjvriii^ iiiaiiuaia aic aiii^pcu wiiii iiic ixu. in iviitiupiutcssoi iiciiiiiiig /-viu. 

P A-8005 1 5 MAC-TUTOR REFERENCE MANUAL 
P A-8005 1 6 MAC-TUTOR SELF-TRAINING MANUAL 
PA-800517 MAC-8 HEXADECIMAL CODING CHART 

For questions or comments concerning MAC-Tutor usage, repairs, documentation, and/or to 
be placed on distribution for future documentation updates, dial the MAC-Phone on CORNET 
233, extension MAC8 (6228). 



PA-80051 5 

Issue 2, July 1979 Contents 



MAC TUTOR REFERENCE MANUAL 
CONTENTS 

1. SYSTEM OVERVIEW 1-1 

1.1 Introduction 1-1 

1.2 System Features 1-1 

2. MAC TUTOR HARDWARE 2-1 

2.1 Functional Description 2-1 

2.2 Electrical Characteristics = = = . ^ ^ ^ . * . . 2-1 

2.2.1 MAC-8 Microprocessor and Reset Circuitry (See Figure 2-2.) .... 2-2 

2.2.2 ROM and RAM (See Figure 2-3.) 2-2 

2.2.3 I/O (See Figure 2-4.) 2-7 

2.2.4 Keypad (See Figure 2-5.) 2-11 

2.2.5 PROM Programmer (See Figure 2-6.) 2-12 

2.2.6 TTY Terminal and Data Set Interface (See Figure 2-7.) 2-12 

2.2.7 Cassette Tape Interface (See Figure 2-8 ) ........... 2-15 

2.2.8 Power Supply Circuitry (See Figure 2-9.) 2-16 

2.2.9 Timing 2-17 

3. MAC-8 ARCHITECTURE 3-1 

3.1 General Registers 3-1 

3.2 Register Pointer 3-1 

3.3 Pushdown Stack 3-2 

3.4 Addressing Modes 3-3 

3.5 Conditions . . . ' 3-4 

3.6 Interrupts 3-4 

3.7 Traps 3-5 

3.8 Reset • 3-5 

4. MAC TUTOR SOFTWARE ......,.,........,, 4-1 

4.1 Functional Description . 4-1 

4.2 Operation 4-1 

4.2.1 Keypad/ Display 4-1 

4.2.2 Keypad Button Control 4-1 

4.2.3 TTY Control 4-7 

4.2.4 System Utilities 4-11 

4.3 Programming 4-11 



PA-80051 5 
Contents Issue 2, July 1979 



4.4 Available Programs 4-12 

4.4.1 Move Memory - *022F 4-12 

4.4.2 Write a PROM - *0541 4-12 

4.4.3 Verify a PROM - *057B 4-13 

4.4.4 Dump to Audio Tape - *06C6 4-13 

4.4.5 Read from Audio Tape - *05EE 4-14 

4.5 Testing and Diagnosing 4-16 

5. GLOSSARY 5-1 

APPENDIX 



Resident Executive Program 



System Overview 

PA-800515 
Issue 2, July 1979 



Chapter 1 
SYSTEM OVERVIEW 



PA-800515 System Overview 

Issue 2, July 1979 



1. SYSTEM OVERVIEW 

1.1 Introduction 

Tkg MA.C Tutor is a low cost, self-contained, microprocessor-based system developed to famil- 
iarize users with microprocessor basics and, in particular, with MAC-8 microprocessor opera- 
tion. 

1.2 System Features 

The MAC Tutor contains an on-board keypad and an 8-digit display whereby MAC-8 programs 
can be entered, executed, and debugged. In addition, the necessary interface is available for 
various peripheral equipment, such as a teletypewriter (TTY) terminal, a time-sharing com- 
puter, or a cassette tape recorder. Figure 1-1 shows the MAC Tutor sections. 

MAC Tutor features include: 

• MAC-8 microprocessor 

• 2K bytes of random-access memory (RAM) 

• 2K read-only memory (ROM) executive program to control hardware features 

• Sockets for three IK-byte programmable read-only memories (PROMs) 

• Eight 7-segment light-emitting diode (LED) displays 

• 28-button, calculator-type keypad 

• PROM programming socket capable of creating and verifying Intel 2708-type, IK-byte 
PROMs 

• Audio cassette interface for storing and retrieving data at a rate of 166 baud 

• 32 input/output (I/O) lines with a socket to add another 24 lines 

• RS232C interface for TTY-compatible terminals capable of running at rates from to 
2400 baud 

• Data set interface with software-controlled data direction switch 

• Address and data buses available on 16-pin connectors for addition of memory or peri- 
pherals 

• Ability to single-step program instructions 

• On-board power supply (110-volt ac, 60-Hz input required) 



1-1 



System Overview 



PA-800515 

Issue 2, July 1979 



2Kx8-BIT (BYTE) 
RANDOM-ACCESS 
MEMORY (RAM) 



CONNECTORS FOR 
INPUT-OUTPUT LINES 
AND BUS ACCESS 



SOCKETS FOR THREE 
1Kx8-BIT(BYTE) 
PROGRAMMABLE 
READ-ONLY MEMORIES 

(PROMS) 
(SUPPLIED BY USER) 



2Kx8-BIT (BYTE) 
READ-ONLY MEMORY 

(ROM) 
CONTAINS EXECUTIVE 
PROGRAM 



MAC-BAND CLOCK 




TWO RS 232C 

CONNECTIONS FOR 

TTY TERMINAL OR MODEM 



POWER 
SUPPLY 



CASSETTE 

TAPE 

INTERFACE 



KEYPAD AND 
DISPLAY 



ADDRESS DECODING 
AND RESET LOGIC 



PROM PROGRAMMING SOCKET 



Figure 1-1. MAC Tutor Sections 

Note: The material in this manual pertains to ISSUE 4 models (prototype version). ISSUE 4 
schematic diagrams are shown in Figures 1-2 and 1-3. ISSUE 3 schematic diagrams, Figures 1- 
4 and 1-5, are included for reference only. 



1-2 



PA-800515 

Issue 2, July 1979 



System Overview 




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Figure 1-2. MAC Tutor Schematic Diagram 
Issue 4, Sheet 1 



1-3 



PA-800515 

Issue 2. Julv 1979 



Svstem Overview 




Figure 1-3. MAC Tutor Schematic Diagram 
Issue 4, Sheet 2 



i-5 



PA-RnnRiR 



system Uverview 




Figure 1-4. MAC Tutor Schematic Diagram 
Issue 3, Sheet 1 



1-7 



TM-OUUO I O 

Issue 2, July 



1979 



System Overview 




:se ge e 



Figure 1-5. MAC Tutor Schematic 
Diagram Issue 3, 
Sheet 2 



1-9 



PA-800515 MAC Tutor Hardware 

Issue 2, July 1979 



Chapter 2 
MAC TUTOR HARDWARE 



PA-800515 MAC Tutor Hardware 

Issue 2, July 1979 



2. MAC TUTOR HARDWARE 

2.1 Functional Description 

The MAC Tutor contains a MAC-8 microprocessor and the associated control circuitry to per- 
form the computing and controlling functions for the entire MAC Tutor. Figure 2-1 is a block 
diagram of the MAC Tutor hardware. 

The instructions to be executed by the MAC-8 are contained in the ROM and RAM. The 
ROM can be mask programmed at the factory or field programmed by inserting a blank PROM 
into the PROM programmer. The RAM can be read or written directly with the microproces- 
sor. 

The 2K-byte ROM (mask programmed) contains an executive program that includes the rou- 
tines required to drive the display, read the keypad, and communicate with a terminal. 

The IK-byte RAM is used for MAC-8 registers, stack memory, and a user's program. Because 
this memory is volatile, it must be recorded into a PROM or cassette tape for retention. 

Three sockets are provided for 2708-type PROMs, each having a capacity of IK bytes. These 
PROMs can be programmed with the on-board programmer, using the separate 24-pin socket. 
Programs are erased by exposing the PROMs to ultraviolet light. 

Users enter and debug their MAC-8 programs by interfacing with the 28-button keypad and 
eight 7-segment LED displays. Commands to the executive program are issued through the 
keypad and acknowledged through the display. 

Sixty-four I/O lines, with a socket to add another 24 lines, are provided. Thirty-two I/O lines 
are used for internal operation and the remaining lines terminate at the 16-pin periphery sock- 
ets. Sixteen of these lines are transistor-transistor logic (TTL) outputs with an 8-mA current 
drive. The others that can be programmed as I/O lines are also TTL compatible, but have a 
1.6-mA current drive (4 LSTTL Loads). 

The computer/TTY data switch allows a remote computer or TTY terminal to communicate 
with the MAC Tutor. 

A commercial quality cassette tape recorder can be used to store and retrieve files by connect- 
ing the microphone input and earphone output to the MAC Tutor. 

A conventional 110- volt input connects to the on-board power supply, which generates the 
required voltage levels of ±5, +12, and +27 volts dc. 

2.2 Electrical Characteristics 

The electrical sections of the MAC Tutor are: the MAC-8 and reset circuitry, ROM and RAM, 
I/O, keypad and display, PROM programmer, TTY terminal and data set interface, cassette tape 
interface, power supply circuitry, and timing. 



2-1 



MAC Tutor Hardware T^'^^n^IL iq7Q 

Issue 2, July 1979 



2.2.1 MAC-8 Microprocessor and Reset Circuitry (See Figure 2-2.) 

Conventionally, the reset input to a CPU resets the program counter to zero and a program 
begins to execute. However, the MAC-8 CPU also handles the reset input as a nonmaskable 
interrupt. That is, the status of the CPU is saved before resetting. As a result, the MAC Tutor 
uses the reset input for a power-on reset, single stepping, and nonmaskable interrupt. The 
reset button then allows the user to stop the execution of a program and monitor the location 
and status at that point. This unique feature requires the reset circuit to clock-in on only one 
reset request. 

When the reset button is depressed, the first operation code (opcode) fetch generates the reset 
and the succeeding opcode fetch disables the reset. 

A power-on detect flip-flop (F13-A) serves to distinguish between the reset function and the 
nonmaskable interrupt. Multivibrator J15 applies the reset signal 25 /ns after a low to high sig- 
nal transition to provide the single-stepping capability. 

The basic controlling signals for remote access or system expansion are available at connectors 
Jl, J2, and J3. These signals include the address and data buses as well as the +12, +5, and -5 
volt dc buses. The 1-kilohm resistor (R48) allows the reset pin to be externally driven. 

2.2.2 ROM and RAM (See Figure 2-3.) 

The MAC Tutor circuitry is capable of driving one 2K by 8 ROM, three IK by 8 PROMs, and 
four IK by 4 RAMs. The chip-select lines are decoded from the address space through a 3- to 
8-line decoder (J 13 138). Table 2-1 lists the address assignments provided through these 
decoders. 

The AMD 9131 clocked static RAMs do not need refreshing, but require a clock transition to 
latch in the address and chip-select signals. The required clock pulse edge is generated by a 
monostable multivibrator (J 15 221-B, one-half of the 74221). The multivibrator is triggered by 
the falling edge of the clock-out pulse (CKO). Then, after a 400-ms delay, a positive going 
clock pulse (CKOM) is generated. For 2-MHz operation, a faster clock pulse edge is required. 



2-2 



PA-800515 

Issue 2, July 1979 



MAT Tutor Hardware 



EXT DMA 
Jl (DMA ENABLE) 



ADDRESS 
npnnnFR 



AlO- A15 I 
ADDRESS BUS 



READ, 
WRITE 



Jl DATA BUS DO -D7 (8 BITS) 



CONTROL BUS (CLOCH.REAO. 



SELECT 



ROM SELECT (EXEC) 



]■'"' 



EPROM SELECTS 



■*► WO EPROMs 



EXEC 

ROM 

2KX 8 



A0-A15(16 bits) 



AO-AU iiD0-D7 u 



WRITE) 



"V 



FROM WAIT STATE iM 
GENERATOR 
J 1 DATA READY 



> 



> 



INTERRUPT REQUEST 



RESET 



FROM RESET 
TIMING CIRCUIT 



RST 



> 



J3 DMA REQUEST 



DMA ACKNOWLEDGE 



1 STATUS (S0-S2) 



TO RESET 
TIMING CIRCU 



V 



MAC -8 

CPU 

AND CLOCK 

REFERENCE 



CLOCH. 



READ, WRITE 



DATA BITS 
D0-D7 



WAIT 

STATE 

GENERATOR 



A2-A4 
(SELECTS) 



CLOCK , 

ii READ, a 

WRITE 



PPI SELECTS, READ I/O, WRITE I/O 



RDY (READY) 



TO CPU 



TO 

PROGRAMMABLE 

PERIPHERAL 

INTERFACES 

(PPIs) 



ENABLE (clock) 



D0-07 



OUTPUT 
LATCHES 
(D TYPE) 



naT » Ail T niiT 

uAi n uu I ru I 



/1DB0-1DB7\ 
\20B0-2DB7/ J4 



ADDRESS BUS (A0-A15) 



CLOCK 



MONO 
MULTI 



CHIP 
ENABLES 
(CKOM) 



WRITE 



, RAM SELECTS 



ADDRESS BITS 
A0-A15 



FROM 
ADDRESS <; 
DECODER 



RAM 
MEMORY 
2KX 8 



A0-A9 

— * — ♦ 



DO-07 



EPROM SELECTS 



EPROM 
MEMORY 
SOCKETS 

/3S0CKETS\ 
UK X 8 EACH/ 



PPI SELECT , 

READ 1/0, 

^, WRITE I/O 
FROM WAIT STATE GENERATOR \ ■ 



A0-A9 



DATA BUS (D0-D7) 



A0,A1 
[PORT ADDRESS) 



D0-D7 



D0-D7 



PROGRAMMABLE 

PERIPHERAL 

INTERFACE 

(024) 

(SOCKET ONLY) 

(8255-3) 



TUTOR 
I/O PORTS 



PORT G 
(PG0-PG7) J6 



PORTH I 
(PH0-PH7) I 



PORT! 
(PI0-PI7) JT 



FROM ] , 

wait state \ - 
generator] 



PPI SELEC T. 
READ I/O, 



wDirr T lf\ 
-nut i»w 



AO.Al 
[PORT ADDRESSES) 



DO-07 



00-07 



PROGRAMMABLE 

PERIPHERAL 

INTERFACE 

(D24) 

(8255-1) 



AO.Al 
(PORT ADDRESSES) 



PPI SELEC T 

READ I/O, 

"0" 1 WRITE I/O 
WAIT STATE > « 

GENERATOR J 



TUTOR 
I/O PORTS 

PORTA 
(PAO-PAT) 

— « — » # 



nirt ftiiT f Di i \ 

uni n wg I \> ni I 



PA0-PA3 
^ TO KEYBOARD 

PORT B 1 TO DISPLAY 

tPBO-PBT) I DECODER/DRIVER 

^ I AND PROM 

PORTC ^ PROGRAMMER 
(PCO-PCT) 



PROGRAMMABLE 

PERIPHERAL 

INTERFACE 

(016) 

(8255-2) 



DATA IN (PAT) 



CASSETTE 

TAPE 
INTERFACE 



TJ^PF niiT 



TAPE IN 



TERMINAL IN /MODEM OUT 
DATA (PA6l 



MODEM IN/TERMINAL OUT 
DATA (PAS) 



SELECT MODEM /TERMINAL (PCO) 



PC5,PC6 



^y TO PROM PROGRAMMER 



TERMINAL/MODEM 
INTERFACE 

(BS232C) 



SERIAL DATA IN 



SERIAL DATA OUT 



MODEM DATA IN 



MODEM DATA OUT 



< 



■^ 



TUTOR 
I/O PORTS 



PORT D 
(PD0-PD7) 



FROM 
PORT 



FROM 

PORT 

A 









DIGIT SELECTS 


.DISPLAY 
(8 DIGITS) 


PB0-PB3 




DISPLAY 
DECODER /DRIVER 













KEYBOARD STROBE 


KEYBOARD 
(28 KEYS) 






(PA0-PA3) 


PDA - PHP 


DISPLAY 
DRIVER 






^ 




' 


' 













< 



PORT E 
(PE_0-Pn) j5 FROM 
" ^ PORTS 

BIG 



PORT F 
(PF0-PF7) 



1 A0-A9(PB0-PB7,PC1.PC2) ^ 



CHIP_SELECT/WRITE ENABLE 

■^ , (CS/WE) (PCS) 

FROM 1 — ■ 

•"^"^ I PROGRAM (PG6) 

C —a 




DATA 
(PD0-PD7) 



RST 



(RESET) 



FROM 1 PC3.PC4,PCT^ 
PORTCJ 



FROM 1 
CPU J 



STATUS 
(S0-S2) 




NOTE 

Pin information for connectors Jl through J8 

is shown in Table 2-2. MAC Tutor Pinouts. 



Figure 2-1. Functional Block Diagram of MAC-Tutor 



2-3 



PA- 8005 15 

Issue 2, July 1979 



MAC Tutor Hardware 



-/■ ROM -I- MM 

26 CmCttlT 



TO . re3.4.T 

I/O CIRCUIT 



-/■ TO 

^^ I/O ClUCUIT 




«i<«l-0 



»4 \13 



Figure 2-2. MAC-8 Microprocessor and Reset 
Circuitry Schematic Diagram 



2-4 



PA-800515 

Issue 2, July 1979 



MAC Tutor Hardware 







Figure 2-3. ROM and RAM Schematic Diagram 



2-5 



PA-80051 5 

Issue 2, July 1979 



MAC Tutor Hardware 



TABLE 2-1. ADDRESS ASSIGNMENTS/ MEMORY MAP 



Device 


Physical 
Location 


A15 


A14 


A13 


A12 


All 


AlO 


A4 A3 A2 Al AO 


Hex 
Addresses 


32AG ROM 
32AAF ROM 


NOl 

















X 




0OOO-07FF 


2708 PROM 


KOI 














1 







0800-OBFF 


2708 PROM 


GOl 














1 


1 




OCOO-OFFF 


2708 PROM 


DOl 





















1000-13FF 


9131 RAM 


D05-K05 
















1 




1400-1 7FF 


9131 RAM 


G05-N05 













1 







1800-lBFF 


8255 I/O 


D24 













1 


1 





1F00-1F03 


8255 1/0 


D16 













1 


1 


1 


1F04-1F07 


8255 I/O 


D20 













1 


1 


1 


1F08-1F0B 


74LS273 I/O 


CIO 













1 


1 


110 1 


IFOD ' 


74LS273 I/O 


C13 













1 


1 


1110 


IFOE 



Table Notes: 1. X designates either logical 1 or 0. Blank areas 
indicate future expansion. 

2. Unit comes equipped with one of the two listed ROMs. 

Four wire straps connecting points A through D to E through H provide memory assignment 
flexibility. By interchanging points A and B with C and D, the address of executive ROM is 
interchanged with that of PROM 2 and PROM 3. This allows the user's PROM to have 
immediate control under a power-on or reset condition. 

A wire strap between points J and K allows an interrupt to the MAC-8 to cause control of the 
program to transfer to the first location in PROM 1. 

The memory configuration can be expanded or replaced by connecting external address signals 
to the two 16-pin dual in-line package (DIP) connectors, Jl and J2, located at the periphery. 
The entire memory can be deactivated by keeping EXDMAL (Jl, pin 7) low. 

2.2.3 I/O (See Figure 2-4.) 

The MAC Tutor circuitry is capable of driving three Intel 8255 programmable peripheral inter- 
face (PPI) integrated circuits and two 74LS273 octal latches. 

Each 8255 PPI has three I/O ports (eight lines per port) that can be programmed as either 
inputs or outputs. In the output configuration, they can only drive one medium-power TTL 
load. However, the two output ports provided by the 74LS273 latches have a drive fanout of 
10 Low Power Schottky TTL (LSTTL) loads. 



2-7 



Issue I, July 19/a 



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01901 JflOO 




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y mod 



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2iSi»! 



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Figure 2-4. I/O Port Schematic Diagram 



2-9 



PA-80051 5 

Issue 2, July 1979 



MAC Tutor Hardware 



Four of the I/O ports are used mainly to drive the keypad display, and PROM. Additionally, 
two 8255 I/O ports, or five 8255 I/O ports when fully equipped, are available at connectors J5 
through J7. The remaining two 74LS273 ports are available at connector J4. 

A wait state generator integrated circuit (WE-146D) provides the required decoding and timing 
for the I/O devices. Refer to Figure 2-3 for circuit details. 



Table 2-2 contains a listing of all the I/O pinouts. (This information is also includea on Mgures 
1-2 and 1-3.) 

TABLE 2-2. MAC Tutor Pinouts 



Pin Number/Connector 



Jl 


J2 


AOO 


A04 


WRL 


AD8 


RDL 


AD9 


RSTL 


ADIO 


RDY 


ADU 


CKO 


AD4 


INTL 


ADS 


EXDMAL 


AD6 


GRD 


AD7 ( 


D7 


ADS 


D6 


AD2 


D5 


ADl Dl 


D4 


ADO Dl 


D3 


AD15 


D2 


AD14 


Dl 


AD13 


DO 


AD12 



J3 
A08 



NC 
NC 

NC 
NC 
NC 
NC 



J4 

A12 



J5 
A16 



J6 
A20 



J7 
A24 



Pin 

No. 



2DB3 PF7 PHO GRD 1 



2DB2 
2DB6 
2DB7 
1DB3 
1DB2 
1DB6 



GRD 


1DB7 


PE4 


+12 


1DB5 


PE3 


NC 


1DB4 


PE2 


DMARL 


IDBl 


PEl 


DMAAL 


IDBO 


PEO 


SO 


2DB5 


PF3 


SI 


2DB4 


PF2 


S2 


2DB1 


PFl 


+5 


2DB0 


PFO 



PF6 PHI 

PF5 PH2 

PF4 PH3 

PE7 PG7 

PE6 PG6 

PES PGS 



PG4 
PGS 
PG2 
PGl 
PGO 
PH4 
PH5 
PH6 
PH7 



NC 

NC 
NC 
PIO 
PIl 
PI2 

PIS 
PI4 
PIS 
PI6 

PI7 

NC 
NC 
NC 
+S 



9 

10 
11 
12 
13 
14 
IS 



Connector J8 



Designation Pin No. 



+5 VOLTS 

GRD 

TAPE-IN 

TAPE-OUT-LO 

GRD 

TAPE-OUT-HI 

CM-RC 

GRD 
CM-TR 
TTY-KB 

GRD 
TTY-PR 



9 
10 
11 
12 



2.2.4 Keypad (See Figure 2-5.) 

The keypad includes a 4 by 7 array of switches that is read with a strobing algorithm. Each row 
is strobed with a logical signal and the state of the seven columns is read. Since the column 
outputs are converted to logic highs by a set of resistors (R15), a keypad depression in a partic- 
ular column will cause a logical reading at that input line. Strobing is repeated for the four 
rows so the MAC-8 can determine the state of the keypad. 

The display contains eight 7-segment LED displays where digits are multiplexed in time and 
driven by common segment drivers. The same lines (PDO through PD6) that are used to read 



2-11 



MAC Tutor Hardware PA 80051 5 

Issue 2, July 1979 



the keypad also drive the segments. Output lines PBO through PB3 are decoded to select the 
appropriate digit. 

2.2.5 PROM Programmer (See Figure 2-6.) 

The programming procedure for 2708 PROMs requires the following: 



Initiate write enable by applying 12 volts to CS/WE pin. 

Sequence the address space of the 2708 PROM and apply data to be programmed for each 
address. 



• When the address and data are valid, apply a 27-volt pulse of 1-ms duration to PRO- 
GRAM pin throughout the address sequence. 

• Repeat address sequence 100 times. 

A mix of software and hardware is used to implement the preceding procedure. High-level tim- 
ing and control are done in software. The hardware has the 12- volt driver for the write enable 
signal and the 27-volt driver for the program pulse. This program pulse is generated by the 
resistance-capacitance (RC) circuit (R12, R13, CI) to produce a l-fis rise and fall time level, 
level. 

The PROM address and data lines are driven directly from the I/O ports so the MAC-8 can 
sequence through the address and data, and control the high-voltage drivers. After device pro- 
gramming, the MAC-8 is able to read the PROM if a low-level signal is coupled to the CS pin. 
This allows the PROM to be verified prior to programming for an erased condition (all Is) and 
after programming for programmed contents. 

2.2.6 TTY Terminal and Data Set Interface (See Figure 2-7.) 

When a TTY terminal is connected to the MAC Tutor, all operations provided from the on- 
board keypad/display can be controlled from the TTY terminal. The interface to the TTY ter- 
minal is through a serial I/O line under direct control of the MAC-8. The MAC Tutor adapts 
to the baud rate of the terminal (up to 300 baud automatically and manually to 2400). Data 
can also be accepted from a remote computer through a telephone line when a modem is con- 
nected. A built-in, software-controlled data switch allows one of two configurations to be 
selected. In one configuration, the TTY terminal is fully connected to the modem with the 
MAC Tutor in the listening mode. In the other configuration, the TTY terminal is connected 
to the MAC Tutor and the modem is switched out. Both configurations are selected from the 
TTY terminal. Table 2-3 lists the TTY terminal and data set interface connections. 



2-12 



I 




— 


-D 


m 


> 


C 




CD 


c» 




o 




o 




(71 






c 


Ul 


< 




_» 




CO 




>«J 




CO 





> 
n 

H 

e 



X 

1-1 

S8 



Figure 2-5. Keypad and Display Schematic Diagram 



MAC Tutor Hardware 



PA-800515 

Issue 2, July 1979 




s 


POO 


10 


PD1 


11 


P02 




P03 




PD4 




P05 




PD6 




PD7 



POO- 7 

-7f 



TO 



8 I/O CIRCUIT 



Figure 2-6. PROM Programmer Schematic Diagram 



TO 
IA)CN»IT '3 



7^ 



PCO 



PAS 




P/0J8 




+5 

am 



<10 



■<ii 



■<i? 



<i 



<t 



R36 

■A/W K? 

U 



CRD 
PR 

CM-TR 



CRD 



CM-RC 



TTY 



MODEM 



Figure 2-7. TTY Terminal and Data Set Interface Schematic Diagram 



2-14 



PA-80051 5 

Issue 2. July 1979 



MAC Tutor Hardware 



TABLE 2-3. TTY TERMINAL AND DATA SET INTERFACE CONNECTIONS 



MAC Tutor 
Connector 


TTY Terminal 
Connector 


J8 (RS-232C level compatible) 

Pin 10 - Terminal/Keypad 
Pin 12 - Terminal/Printer 
Pin 11 -Ground 


0^ r\tr\ it-»*^rro/-»<a i^rvmrkor-tor 

(RS-232C level compatible) 

Pin 2 - Terminal/Keypad 
Pin 3 - Terminal/Printer 
Pin 7 - Ground 


MAC Tutor 
Connector 


Modem 
Connector 


J8 (RS-232C level compatible) 

Pin 9 - Modem Transmitter 
Pin 7 - Modem Receiver 
Pin 8 - Ground 


25-pin interface connector 
(RS-232C level compatible) 

Pin 2 - Transmitter 
Pin 3 - Receiver 
Pin 7 - Ground 



Table Note: In addition, some of the pins on the TTY terminal connector may be required to be strapped together for 
proper operation. Typically, pins 4, 5, 6, and 8 should be strapped together. 

2.2.7 Cassette Tape Interface (See Figure 2-8.) 

A cassette tape recorder microphone input and earphone output can be connected to the MAC 
Tutor to read and write data. 




Figure 2-8. Cassette Tape Interface Schematic Diagram 

To write data, the MAC Tutor generates a frequency shift keying (FSK) signal that ahernates 
between 2000 and 4000 Hz. When a logical is written on the tape, 2000 Hz appears for two- 
thirds of the bit time and 4000 Hz for one-third of the bit time. When a logical 1 is written, 
2000 Hz appears for one-third of the bit time and 4000 Hz for two-thirds of the bit time. 

To read data, an LM565 phase-lock loop integrated circuit (IC) with a free-running frequency 
of 3000 Hz locks on the input signal. The input voltage to the voltage-controlled oscillator 



2-15 



MAC Tutor Hardware 



PA-800515 

Issue 2, July 1979 



(VCO), which is available from the LM565 IC, indicates what frequency is being received. 
This signal is then passed through an RC filter to eliminate the carrier frequencies, while retain- 
ing the modulating signal. A comparator converts this low-level signal to a TTL signal for 
MAC-8 input. The MAC-8 synchronizes to the bit pattern by detecting the negative transition 
(from 4000 to 2000 Hz) and determines the state of the bit transmitted by the incoming 
waveform duty cycle. 

The operating baud rate is 166 bits per second to ensure low error rates and portability of tape 
cassettes from one recorder/MAC Tutor to another recorder with a different MAC Tutor. The 
cassette tape recorder interface connections are listed in Table 2-4. 

TABLE 2-4. CASSETTE TAPE RECORDER INTERFACE CONNECTIONS 



MAC Tutor 
Connector 


Cassette Tape Recorder 
Connector 


J8, Pin 6 - TAPE-OUT-HI 
J8, Pin 5 - GROUND 
J8, Pin 3 - TAPE IN 
J8, Pin 2 - GROUND 


MICROPHONE JACK 
MICROPHONE JACK GROUND 
EARPHONE JACK 
EARPHONE JACK GROUND 



Table Note: An additional pin designated TAPE-OUT-LO (pin 4) is provided for cassette tape recorders that require a 
low-level input to the microphone jack. 

2.2.8 Power Supply Circuitry (See Figure 2-9.) 

The 11 7- volt ac line is stepped down by a 16- volt ac center-tapped transformer and four dc vol- 
tage outputs are generated, as indicated in Table 2-5. 

Two voltage doubler circuits are used to generate the +27 and -5 voltage levels. The +27 vol- 
tage doubler circuit operates by charging capacitor Cll through diode CR4 on the negative 
half-cycle. On the positive half-cycle, CR4 becomes reverse- biased and the conducting path is 
through Cll, CR3, and C12. Therefore, the voltage on Cll gets added to the ac voltage to 
effectively double the dc output voltage. Regulator VRl is a 3-terminal, -15 volt regulator that 
uses the 12-volt supply as a reference. By adding this 15-volt supply to the 12- volt supply, the 
required 27-volt supply is obtained. 

The 5-volt supply uses a full-wave bridge rectifier due to the high current requirement. 



2-16 



PA-800515 

Issue 2, July 1979 



MAC Tutor Hardware 



C11 



TOM 

POSES 

supPLr 



AC 
16V 

o— 



^\r 



m 



aCR4 



CaMOK 

o— 



cm 



C«5 

-w- 



'2^100 
+ I9V 



VK1 



I (+27 REO ] 






VR2 
(+12 REO 



IK 



+12 



M ! — ° 



nCRi 
011 T 



> + 


»V 1 


VB 

(+SReo 


2 




+ 5 






tSS 


■-; 






Jl 


kCRT 



H4- 



1CCC 



vl^C19 
+J-1000 




Figure 2-9. Power Supply Schematic Diagram 
TABLE 2-5. POWER SUPPLY VOLTAGE AND CURRENT RATINGS 



Voltage 


Current Rating 


+5Vdc 
-5Vdc 
+12 Vdc 
427Vdc 


1.5A 
120 mA 
250 mA 
20 mA 



Table Note: The 5-volt supply has 350 mA of spare current available at J8, pin 1 to drive the external logic. 

2.2.9 Timing 

Several factors are involved in the execution time (as defined in terms of microprocessor clock 
cycles) of an instruction. In one clock cycle a byte can be read from memory, a byte can be 
written into memory, or some internal function can be accomplished. To minimize require- 
ments on the memory response time, Ithere is a pipeline processor internal to the MAC-8 that 
imposes a lower bound on the total execution time of any instruction. A simple no outpulsing 
(NOP) instruction requires four cycles for completion and most instructions are multibyte to 
ensure that minimum time is used effectively. Timing detail diagrams include the following: 

• Fast Memory Accessing, Figure 2-10 

• Slow Memory Accessing, Figure 2-11 

• A Wait State Generator, Figure 2-12. 



2-17 



MAC Tutor Hardware 



PA-800515 

Issue 2, July 1979 



\ 




1 cycit 


. 1 






500 


ns '1 




CLOCK OUT \ 


/ 


\ 








ADDRESS BUs\/ 




Y 


A0-AI5 /\ 




A 




> 1.8 VOLTS 
DATA READY 

READ V 




A 


DATA VALC-, 
(2) i 


DATA BUS 
DBO-DBr 


^ 


\\pATA ASSUMED INVALIO\V\\ 




M 






/ 


h- 






\ 


WRITE 


\ 


/ 

■H 




5-125 _ 
nSEC 




^^^^ 


DATA VALID 


^ 



READ 
ACCESS 



WRITE 
ACCESS 



(1) TR AND TF ARE 50n» CORRESPON0«NG TO BUS CAPACITANCE OF 
50pF. EACH ADDITIONAL pF INCREASES TB AND TF BY I ns 

(2) DATA VALID WINDOW IS USED TO LATCH DATA INTO THE. MAC -8. THE 
VOLTAGE PRESENT ON THE DATA PIN AT THE END OF THE WINDOW 
DETERMINES THE LATCHED BWARY LEVEL. 



Figure 2-10. Fast Memory Accessing 



CLOCK OUT 


\ 


/ 


\ 




r 


V 




y 


"V 
















ADDRESS BUS 


X 










X 










READ 


A 
















-^ 


READ 




CYCLES 


WRITE '*' 


















J 




READ ' 




A 

1 STROBE (1) 




/ 


STRC 






STROBE 




WRITE 
CYCLES 


WRITE 




/ 

IK 


\* 


DATA READI 


' \ 







DATA BUS 
DBO- DB7 
























f 
DATA VALID 
ON WRITE 






V / 

DATA LATCHED 

ON READ 







(I) EXCEPT FOR STROBE TIME, DATA READY LEVEL IS A DON'T CARE. 



Figure 2-11. Slow Memory Accessing 



2-18 



PA-800515 

Issue 2, July 1979 



MAC Tutor Hardware 



<1 



BORROW. 






74193 



Al4 



1 



BINARY 
COUNTER 



laJ5 



PT 



7474 
D F/F 



CLK 



CLK 



MAC-8 



DA RDY' 



CLK 

A IS 

A|4 _/- 



READY"\__t 



STROBE 




DATA 
INTERNAL WAIT 
STATE 

PE 



* FOR A SINGLE WAIT STATE GENERATOR. THE COUNTER CAN BE 
ELIMINATED WITH BEING CONNECTED AS AN INPUT OF 
THE 2 INPUT NAND GATE. 



Figure 2-12. A Wait State Generator 



2-19 



PA-800515 MAC-8 Architecture 

Issue 2, July 1979 



Chapter 3 
MAC-8 ARCHITECTURE 



PA-800515 MAC-8 Architecture 

Issue 2, July 1979 



3. MAC-8 ARCHITECTURE 

The MAC-8 is a byte-oriented, general purpose microprocessor in which the instruction reper- 
toire emphasizes Boolean logical and integer arithmetic operations on 8-bit quantities. These 
instructions are supplemented by 16-bit operations chosen to facilitate address arithmetic. 

Because the MAC-8 is a 2-address microprocessor, typical instructions for dyadic operations 
such as addition specify only two operands, the augend and addend. By convention, one of the 
operands is also the destination of the result. To distinguish the operands, one is called the 
source and the other is the destination, even though both are operand sources for dyadic opera- 

t;/-»»-.o C/-\»- t-»-i /~i n Q /-) i r> f-vrvprot J/-\nc: c:ii.-->K po i r->r>rompn t i r>o tVioro ic r\n\\r r\irM^ rjnAranH r'CillpH tnP nPQ- 
iiciid. i wi iinjiiavaiw UpC'i aiiv^iio auv-ii ao iiivi v^iiiviiniig, mviw lo \jiiij ivnv^ v/pv^i anv.*, «^aiiu^ mw ^^>^^ 

tination, which is also the source. 

A set of memory-addressing modes is available for accessing up to the maximum of 65,536 
bytes of storage. These modes, together with a set of identical general purpose registers, are 
used to form a highly symmetrical set of operand combinations for the instructions. The same 
memory-addressing modes are used to specify the destinations of control transfer instructions. 

A pushdown stack is used as the subroutine call/return mechanism and allows dynamic storage 
management. Interrupts allow the processor to respond to unusual events in periphery. 

3.1 General Registers 

There are 16 general registers available to the MAC-8 at any given time that can be accessed in 
two different ways: 

• As a 16-bit base register (b register) used primarily to hold memory addresses. 

• As a low-order, 8-bit accumulator (a register) for arithmetic and logical operations. 

When the register is usQd as an a register, only the low-order byte participates. Some opera- 
tions, such as addition, can be performed with either the 8-bit or 16-bit register set. Certain 
operations, such as negation, can be performed only with an a register. 

3.2 Register Pointer 

The MAC-8 general purpose registers, unlike those of most computers, are not special 
hardware registers located in the microprocessor. A 32-byte section of regular memory is used 
as the register set. The first two bytes of this section are register 0, the next two are register 1, 
etc. The starting address of this section (which must be in writable memory) is contained in a 
16-bit, on-chip register called the register pointer (rp). By changing the address in the rp, 
under program control, the user can locate the general registers anywhere in the memory space. 
The rp can be thought of as pointing to a movable 32-byte window in the memory space (a win- 
dow through which the MAC-8 "sees" the register set). 

The three low-order bits of the rp are always zero. For each instruction that accesses a general 
register, the complete effective address of the register is computed from the current value in 
the rp and the source or destination qualifier field of the instruction. Also included is a bit sup- 
plied by the MAC-8 designated as the HI/LO bit. The HI/LO bit determines whether the high- 

3-1 



MAC-8 Architecture 



PA-800515 

Issue 2, July 1979 



or low-order byte of the 16-bit register is being addressed. The formation of the effective 
address is shown in Table 3-1. Notice that the three quantities are aligned as shown and added, 
each being treated as an unsigned integer. 

TABLE 3-1. EFFECTIVE REGISTER ADDRESS 



BIT: 

REGISTER POINTER 



F 


E 


D 


C 


B 


A 


9 


8 


7 


6 


5 


4 


3 


2 


1 





h 


X 


X 


X 


X 


X 


X 


X 


X 


X 


X 


X 


X 












Sor D FIELD 



X X X X 



HI/LOBIT 



□ 



EFFECTIVE 

REGISTER 

ADDRESS 



u 



The bump and debump instructions can be used to add or subtract a 1 to bit 3 or 4 of the rp. 
The effect is to move the general register window up or down in memory by 8 or 16 bytes, 
respectively, corresponding to a change of four or eight 16-bit registers. The effect is to intro- 
duce a new set of registers that partially overlaps the previous set. This makes it possible to 
save and restore the contents of the register set without actually moving any data. 

3.3 Pushdown Stack 

The stack pointer (sp) can be used to implement a last-in, first-out queue or "pushdown stack." 
The sp points to the top of the stack (the last item pushed on or the next item to be popped 
off). Since only the top item and those under it are valid, items above the top of the stack 
should not be used. An item is pushed onto the stack by decrementing the sp by 1 or 2, 
depending on the length of the item, and storing the item at the new address. Conversely, an 
item is popped off the stack by incrementing the sp by 1 or 2, depending on the length of the 
item. The item may or may not be moved somewhere before the sp is incremented. 

In purely software terms, it does not matter whether pushing something onto the stack incre- 
ments or decrements the sp, as long as pushes and pops are complementary. In the MAC-8, a 
push decrements and a pop increments, i.e., the stack grows downward in memory because this 
arrangement often facilitates systemwide memory allocation. In any case, the term "top of the 
stack" always refers to the logical top of the stack, whether or not this represents the highest 
absolute address. 

The most common use for the pushdown stack is in calling subroutines. Since the dynamic 
nature of nested subroutine calls corresponds exactly to the action of a stack, a call is a push 
and a return is a pop. The MAC-8 uses the stack to save and restore the program counter (pc) 
when subroutines are called and when interrupts are accepted. In the latter case, the condition 



3-2 



PA-800515 

Issue 2, July 1979 



MAC-8 Architecture 



register (cr) is also saved on the stack. The depth of nesting of subroutines, plus interrupts, is 
limited only by the amount of memory allocated to the stack. In addition to these automatic 
uses of the stack, the executing program can use explicit push and pop instructions to place 
subroutine parameters and temporary variables on the stack. This use is facilitated by several 
special addressing modes that allow easy access to items at or near the top of the stack. 

3.4 Addressing Modes 

The addressing modes of an instruction are the different ways in which the effective addresses 
of the operands of the instruction are formed. Some instructions do not address memory and 
therefore have no modes. 

Generation of a memory address usually involves one of the b registers. The b register (0 
through 15) is specified in a 4-bit field of the instruction, called the s field for the source and d 
field for the destination. There are eight modes, with each mode representing a way of deter- 
mining a source operand address and a destination operand address. To extend the MAC-8 
addressing capability, s and d fields of register 15 often have special interpretations. In addi- 
tion, mode 4 (memory-to-memory mode) is presently implemented only for 8-bit operations. 

In summary, the three factors that determine how an operand address is calculated are as fol- 
lows: 

• The mode number (0 through 7). 

• Whether the operand is the source or the destination. 

• Whether or not the s'^ecified re*^ister is 15. 
Refer to Table 3-2 for a list of addressing modes. 

TABLE 3-2. ADDRESSING MODES 



Table Key: 
B- 
d- 

n, nl, n2 - 
pc- 
R- 

s - 
sp- 

++- 

[]- 



Addressing 
Mode 


Source 


Destination 


s!=15 


s==15 


d!=15 


d==15 




1 
2 
3 
4 
5 
6 
7 


Rs 
Rs 

Rs 
Rs 

*(Bs+nl) 

*Bs 
*(Bs+n) 

*Bs++ 


*PC 
*PC 

*pc 

*PC 

*(sp-fiil) 

**pc 
*(sp-hi) 
*B15++ 


Rd 

*Bd 
*(Bd-hi) 
*Bd++ 
*Bd-fn2) 

Rd 

Rd 

Rd 


R15 

**pc 

(SP-hi) [*pc-hi)] 

*B15++ 

*(sp-hi2) 

R15 

R15 

R15 



The contents of a 16-bit base register 

The destination operand qualifier (d field) 

An 8-bit signed displacement 

The contents of the program counter 

A 16-bit b register for 16-bit operations or 

an 8-bit a register for 8-bit operations 

The source operand qualifier (s field) 

The contents of the stack pointer 

Indicates a post increment of the b register 

Special interpretation for transfer instructions 



3-3 



MAC-8 Architecture 



PA-800515 

Issue 2, July 1979 



3.5 Conditions 

The 16 conditions in the MAC-8 are logical indicators that can be tested by the conditional 
instructions. A 4-bit condition field in these instructions selects one of the 16 conditions. Each 
instruction uses two opcodes representing, for example, jump on condition true and jump on 
condition false. Refer to Table 3-3 for a list of the 16 conditions and description of the 16 con- 
dition register bits. 

TABLE 3-3. MAC-8 CONDITIONS 



BIT 


CLEARED 


SET 


DESCRIPTION 


REMARKS 





!neg 


neg 


Sign bit of result 




1 


Izero 


zero 


Indicates all zero result 




2 


!ovfl 


ovfl 


Indicates arithmetic overflow 


ACTUAL 


3 


Icarry 


carry 


Indicates carry or borrow 


CONDITION 

REGISTER 

BITS 


4 


!ones 


ones 


Indicates result is all ones 


5 


!odd 


odd 


Lower-order (LSB) of result 




6 


'.enable 


enable 


Interrupts are enabled 




7 


!flag 


flag 


User-designated flag 




8 


lit 


It 


Arithnnetically less than zero (bit OAbit 2) 




9 


llteg 


Iteg 


Arithnnetically less than or equal to zero [(bit OAbit 2)|bit 1] 


DERIVED 


10 


lllteg 


llteg 


Logically less than or equal to zero (bit 3 |bit 1) 


FROM 


11 


Ihomog 


homog 


Logically homogeneous (all zeros or all ones) (bit 4|bit 1) 


CONDITION 

REGISTER 

BITS 0-7 


12 


Ishovfl 


shovfl 


Arithmetic left-shift overflow (bit OAbit 3) 


13 


— 


— 


(Unused, Unassignable) 


(PHYSICALLY 


14 


— 


— 


(Unused, Unassignable) 


NON EXISTENT) 


15 


— 


always 


Condition always true (set) (unconditional jump, call, return) 





nontrue condition 



A bit-by-bit exclusive OR 



bit-by-bit inclusive OR 



Conditions through 5 describe the results of the most recent arithmetic or logical instructions 
that are implicitly altered by many MAC-8 instructions. Condition 6 determines whether or not 
the MAC-8 can be interrupted and condition 7 is available as a user flag. These first eight con- 
ditions are known collectively as the cr. They can be explicitly altered by the set conditions and 
clear conditions instructions. The cr is automatically pushed onto the stack when an interrupt is 
accepted and the saved value is popped back into the cr when a return from interrupt instruc- 
tion is executed. 

The second group of eight conditions, 8 through F, is comprised of read-only indicators. Most 
of them represent useful logical combinations of the first eight. Since these conditions are 
derived from the first eight, it is unnecessary to save and restore them (they are effectively 
saved and restored whenever the first eight are). 

3.6 Interrupts 

Exceptional events (such as interrupt, trap, and reset) alter the course of the program running 
in the MAC-8. They have a common association with a fixed memory location (each different) 
to which control is transferred when the event occurs. 



3-4 



PA-800515 MAC-8 Architecture 

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An external device requests an interrupt by setting the MAC-8 interrupt request pin. If the 
enable condition in the MAC-8 is 0, it will ignore the request because it is in a masked condi- 
tion. If interrupts are enabled and a request is received, the following sequence occurs at the 
completion of the instruction being executed: 

• The cr is pushed into the stack. 

• The pc, which contains the address of the instruction that would have been next exe- 
cuted, is pushed onto the stack. 

• The enable condition is set to 0. 

• The MAC-8 performs a normal read operation, addressing location X(FFFF). In most 
applications, this address will not represent regular memory, but will serve as an interrupt 

dCKnOwicugmcni lu mc iiiiciiu^»liiig ueviv^c. ine vaatd ujf lC iCctu L/jr uin^ i.vij iV.^ o i3 suj^t^xiww 

by the device and is used in the next step. 

• The data byte read is right-adjusted with leading zeros placed in the pc. The next instruc- 
tion is then taken from that location. 

The value placed on the data bus by the interrupting device is effectively a pointer to an 
instruction in the first 256 bytes of memory. This should be the first instruction of the routine 
to process that particular type of interrupt. Depending on the application, there can be one or 
many interrupt handling routines. 

It is the responsibility of the interrupt handler to save other registers (if necessary) before pro- 

from interrupt instruction is executed, causing resumption of the program that was executing 
when the interrupt was accepted. Except for possible changes made by the interrupt handler, 
the state of the microprocessor will be identical to that before the interrupt was accepted. 

3.7 Traps 

A trap occurs when the MAC-8 controller has no valid transition defined for the present state 
and present inputs. This situation can develop when the MAC-8 attempts to execute an invalid 
opcode, when electrical transients disrupt the controller, or when a fault develops in the con- 
troller. However, not all transients and faults will cause a trap. Also, traps cannot be masked. 

When a trap condition is recognized, the sequence occurs as follows: 

• The cr is pushed onto the stack. 

• The pc, which points two bytes beyond an invalid opcode byte, is pushed onto the stack. 

• The enable condition is set to 0. 

• The pc is set to X(0008) and the next instruction is taken from that location. 

Location X(0008) should contain the first instruction of a routine to handle traps. The address 
of the interrupted instruction (which may have an invalid opcode) can be calculated from the 
saved pc. 

3.8 Reset 

An external device resets the MAC-8 by setting the reset pin. When this signal (which cannot 
be masked) is applied, the sequence occurs as follows: 

• The cr is pushed onto the stack. 

• The pc, which contains the address of the instruction that would have been the next one 
executed, is pushed onto the stack. 



3-5 



MAC-8 Architecture PA-800515 

Issue 2, July 1979 



• The enable condition is set to 0. 

• The MAC-8 performs what appears to be a normal read operation, addressing location 
X(FFFF), but the data byte read is ignored. The operation serves only to acknowledge 
the reset. 

• The pc is set to X(OOOO) and the next instruction is taken from that location. 

Location X(OOOO) should contain the first instruction of the routine to handle resets. If a reset 
occurs immediately after power-up, the values of the sp and rp are unpredictable. 

Since the dedicated memory locations are associated with interrupts (traps and resets overlap), 
it is possible to simulate traps and resets by appropriate interrupt signals, as well as by direct 
jumps or calls from other routines. 



3-6 



PA-800515 MAC Tutor Software 

Issue 2, July 1979 



Chapter 4 
MAC TUTOR SOFTWARE 



PA-80051 5 MAC Tutor Software 

Issue 2, July 1979 



4. MAC TUTOR SOFTWARE 

4.1 Functional Description 

A resident executive program is supplied (see Appendix) to allow the user to access the 
hardware components. The primary purpose of this executive program is to enable the user to 
store programs in memory and then execute them. In addition, the executive program provides 
the following: 

Supplies the necessary interface routines to store information permanently on cassette 
tapes or PROMs. 

Allows program debugging with single-stepping, breakpoints, or nonmaskable interrupts. 

Allows communication between a TTY terminal and a time-sharing computer. 



• 



• 



• 



The executive "rcram is divided into three maior sections! 

• Keypad and Display — Commands and directives are given with the keypad and the results 
appear on the LED displays. 

• TTY — All of the capabilities of the executive keypad are available through a TTY termi- 
nal and communication with a time-sharing computer is possible at the same time. 

• Utilities — Programs are available for such functions as writing PROMs, verifying PROMs, 
and writing/ reading magnetic cassette tape information. 

4.2 Operation 

4.2.1 Keypad/Display 

The keypad consists of a standard calculator-type button-pad with four rows, each containing 
seven keys. Each key is marked with two labels, one in blue and the other in yellow. The blue 
labels are presently in use and the yellow labels are intended for future system expansion 
requirements. 

The eight 7-segment LED displays are used mainly to display memory addresses and contents 
of memory locations. The standard arrangement uses the left four digits for memory address 
and the next two digits show the contents of that memory address plus one. The right two 
digits show the contents of that memory location. For example, the number 18001234 indi- 
cates that memory location 1800 contains hexadecimal number 34 and location 1801 contains 
12. The left four digits are the address, the next two digits are the high contents, and the last 
two digits are the low contents. 

4.2.2 Keypad Button Control 

There are 16 keypad buttons labeled through F that represent hexadecimal digits through F. 
A is the decimal number 10, B is the decimal number 11,, and so on through F, which is the 
decimal number 15. These keys are used in conjunction with the other function keys to specify 
exactly what will be done. 

4-1 



MAC Tutor Software f^'^^P^!^ ,„.„ 

Issue 2, July 1979 



Initialize — init 

The purpose of the init button is to reinitialize memory to recover from some abnormal condi- 
tion. When this button is pressed, operations are performed as follows: 

• The executive registers are set to the last 32 bytes of RAM, locations IBEO through 
IBFF. 

• The user program registers are assigned to the preceding 32 bytes of RAM, locations 
IBCO through IBDF. These are the registers that are examined with the /a and /b but- 
tons. 

• User register bll is set to the address of the I/O page, location IFOO. This is done so that 
a user program can call subroutines in the executive program without setting this register 
beforehand. 

• User register bl2 is set to the constant FF02. This enables a user program to easily use 
the executive subroutines to display numbers on the LEDs. 

• The stack is set to just below the user registers. The stack will then grow down toward 
lower addresses. 

• The return address into the executive program is pushed onto the stack. This is to enable 
a user program to make a normal return to the executive program on termination. 

• A zero byte, representing an empty user condition register, is pushed onto the stack. 

• The default value of the program counter (1800 is the first location of RAM) is pushed 
onto the stack. 

• The address of the user registers is pushed onto the stack and becomes the user register 
pointer. 

TTY -@ 

The button with the Bell System logo allows a TTY terminal keyboard to enter commands and 
directives. 

Memory Address — * 

This button is used to specify a memory address. After the * button is pressed and as each 
succeeding button is pressed, the memory address is shifted one place to the left (the last but- 
ton pressed becomes the rightmost digit). For example, if the current memory address is 19AB 
and we wish to look at location 03FD, refer to Table 4-1. 

Register Pointer — /d 

When the /d button is pressed, the display address is set to that location in memory which con- 
tains the register pointer and the right four display digits will indicate the register pointer value. 

This enables the following: 

• Manual change of register pointer. By pressing the = button and changing the two 
memory locations containing the register pointer, operating registers can be set to any 
memory position. 

• Since the register pointer is stored on the stack, the address field will now indicate where 
the bottom of the stack is located. This makes it possible to examine what the program 
has pushed onto the stack. 



4-2 



PA-800515 

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MAC Tutor Software 



TABLE 4-1. MEMORY ADDRESS EXAMPLE STEPS 



Key Pressed 


Display Reading 




19AB1234* 


* 


1800ABCD* 


3 


8003FFFF 


F 


003F5498 


D 


03FDAFED 



Table Notes: 

1. Although memory addresses consisl of four digits, the immediacy of the executive program required only three 
digits to be entered. Whatever memory address is displayed, whether by chance or design, the digits to the right 
will display the contents of those two addresses. 

2. It is a good idea to specify all four digits of a memory address, otherwise leftover digits from the previous address 
could produce unexpected results. 

3. The content of nonexistent memory, in this example 8003, is always FF. 



Display a Register — /a 

The /a button allows examination of the contents of the sixteen 8-bit registers that have been 
assigned for use. After this button is pressed, the display changes to indicate an a register and 
not memory. The left two digits of the address and the digits indicating the high contents are 
blanked out. The right two digits of the address change to the letter a, indicating that the 
display is showing an a register, followed by a digit representing the particular register displayed. 
Register alO is displayed as AA, all is AB, and on through al5, which is AF. By default, the 
register aO is displayed when /a is pressed. The low contents then show what is contained in 
the register indicated by the address. Since'an a register contains eight bits, only the two digits 
of low contents are required (that is why the high contents display is blanked out). Once the 
/a is pressed, the displayed register can be specified as follows: 

• Pressing any of the digit buttons from to F will cause that register (0 to 15) to be 
displayed. 

• The + button will cause the next higher numbered register to be displayed. If the regis- 
ter displayed is 15, AF in the address digits, the + button will cause register aO to appear. 

• The - button will cause the next lower numbered register to be displayed. If the register 
displayed is aO, the - button will cause register al5 to appear. 

For example, to assume that registers a9, a8, al5, and al are to be displayed in that order, refer 
to Table 4-2. 



4-3 



MAC Tutor Software 



PA-800515 

Issue 2, July 1979 



TABLE 4-2. REGISTER DISPLAY EXAMPLE STEPS 



Key Pressed 


Display Reading 




1800 ACED 


/a 


AO 10 


9 


A9 34 


- 


A8 AA 


F 


AF EO 


+ 


AO 98 


+ 


Al BA 



Table Notes: 

1. The /a button causes the display format to change. This allows determination of whether the display refers to 
memory or registers. 

2. The last digit pressed determines which register will be displayed. 

3. Digit, +, and - buttons can be mixed at will to specify which register to display. 

Display b Register — /b 

The /b button allows examination of the contents of the sixteen 16-bit registers that have been 
assigned for use. When this button is pressed, the display is changed to a format indicating that 
b registers are being shown. The left two digits of the address are blanked out and the right 
two digits change to the letter b, followed by a digit that indicates the register being displayed. 
The right four digits of the display are then used to show the 16-bit contents of the b register 
being examined. The /b button operates in the same fashion as the /a button. 

Display Next Location — + 

The + button allows examination of successive locations in memory. When this button is 
pressed, the current memory address is incremented by one and the contents of the new 
memory locations are displayed. 

For example, it is possible to step through memory looking at successive locations, one after 
another. Refer to Table 4-3. 

TABLE 4-3. MEMORY LOCATION EXAMPLE STEPS 



Key Pressed 


Display Reading 


+ 
+ 


18002211 
18013322 
18024433 



Table Note: The standard display has the low contents showing whatever is in the memory location pointed to by the 
address, and the high contents showing whatever is in the following location. This explains why every time + is 
pressed, whatever was showing in high contents is now displayed in low contents. 



Display Previous Location — 

The - buiton performs a function similar to the + button, but in the opposite direction. Every 
time the - button is pressed, the address is decremented by one, which makes it possible to go 
backward in memory and look at different locations one at a time. 



4-4 



PA-800515 

Issue 2, July 1979 



MAC Tutor Software 



Change Contents — = 

The = button makes it possible to change memory. Normally, any digit button depressed 
causes a change in the address. However, after the = button is pressed, any digit button 
pressed causes a change to the low contents. The low contents are shifted left by one digit, los- 
ing the leftmost digit, and the button pressed becomes the rightmost digit. Also, after every 
digit is pressed, the new value of the low contents is stored into the location pointed to by the 



address. For example, to assume that the numbers 
1900, 1902, and lAOO, refer to Table 4-4. 



ind 3 are stored into the locations 



TABLE 4-4. LOW CONTENTS LOCATION EXAMPLE STEPS 



Key Pressed 


Display 


Reading 




18 





♦ 


18 





1 


8 1 


F F F F 


9 


19 


13 2 4 





1 9 A C E D i 





19 


2 2 11 


= 


19 


2 2 11 


= 


19 


2 2 11 





19 


2 2 10 


1 


19 


2 2 1 


-f- 


19 1 


3 4 2 2 


+ 


19 2 


F 8 3 4 





19 2 


F 8 4 


2 


19 2 


F 8 2 


* 


18 





1 


8 1 


F F F F 


A 


1 A 


FACE 





1 A 


D 8 9 A 





1 A 


E D C 


= 


1 A 


E D C 


4 


1 A 


E D 4 





1 A 


E D 4 


3 


1 A 


E D 3 



Table Notes: 

1. The low contents are the ones affected and only one memory location can be changed at a time. 

2. Pressing the = button more than once makes no difference (additional button pressing is ignored). 

3. To correct an error, keep pressing buttons until the proper number is obtained. 

The a and b registers can be changed in a similar fashion. The only difference to keep in mind 
is the operation of b registers. Since the b registers contain 16-bit numbers, all of the rightmost 
four digits in the display are affected when a b register is changed, instead of the rightmost two 
digits. For example, to set a8 to 88, a7 to 77, bl4 to OOEE, bl5 to OOFF, and bO to 00, refer to 
Table 4-5. 



4-5 



MAC Tutor Software 



PA-80051 5 

Issue 2, July 1979 



TABLE 4-5. A AND B REGISTER CHANGE EXAMPLE STEPS 



Key Pressed 


Display Reading 




1 8 F E C D 


/a 


A 3 4 


8 


A 8 12 


= 


A 8 12 


8 


A 8 2 8 


8 


A 8 8 8 


- 


A 7 6 7 


7 


A 7 7 7 


/b 


BO 12 3 4 


E 


BE 3 4 


= 


BE 3 4 


E 


BE 4 E 


E 


BE E E 


+ 


B F 5 5 





B F 5 5 


F 


B F 5 F 


F 


B F F F 


+ 


BO 12 3 4 





BO 2 3 4 





BO 3 4 





BO 4 





BO 



Table Notes: 

1. It is only necessary to key in the number of digits to obtain the required number. Two digits were sufficient for 
bl4, whereas all four were necessary for bO. 

2. Once the = button is pressed, it does not need to be pressed again if the format of the display remains the same. 

3. When the display went from /a format to /b format, the == was necessary to indicate that the b registers were to 
be changed. However, when going from a8 to a7, the executive program remained in a change register mode. 

4. When changing registers or memory, the + and - buttons are used to go to a new register or memory location. 
After examining a specific register or memory location, the = button can be pressed to make necessary changes. 



Program Execution — go 

After a program is placed in memory with the = button, the go button is pressed to start the 
program running. This is an unconditional start and control will not return to the executive 
program unless one of three things happens: 

• The user's program relinquishes control. (If the program executes a return instruction 
with no preceding subroutine call, the program will return to the executive program.) 

• Illegal instructions will cause the executive program to regain control. To set a break- 
point, just place an illegal instruction (FF is a good choice) where the program breakpoint 
is desired. 

• The reset button will also cause the MAC Tutor executive program to take over. 

Single Step — sst 

The sst button operates in the same manner as the go button, but with one difference. Every 
time the sst button is pressed and immediately released, one instruction from the user's pro- 
gram is executed. The executive program then takes control and displays the address of the 
next instruction that would have been executed. This allows successive execution of one 



4-6 



PA-800515 MAC Tutor Software 

Issue 2, July 1979 



instruction at a time from the user's program merely by pressing the sst button. 

If the sst button is pressed and held down, instructions will be executed at a rate of approxi- 
mately two per second. The address display will contain the address of the next instruction to 
be executed (used to view the program in operation) . 

4.2.3 TTY Control 

If a TTY-compatible terminal is available, the MAC Tutor has the capability of using this dev- 
;^^ f/-.r tUp. iic«ir tnterfurf' inctf»jiH nf ihp nn-hnarfl kevnflfl/disnlav. When the Bell Svstem logo 

button is pressed, initialization functions are performed as follows: 

• If there is no TTY connection or if the TTY is turned off, control will immediately return 
to the keypad/display portion of the MAC Tutor executive program. 

• The executive program pauses, waiting for the user to type in a carriage return (cr). This 
key is used by the executive program to determine the terminal operating baud rate. 

• A header is typed out to indicate what version of the executive program is being used. 
Currently the header looks like this: MAC Tutor Exec 1.0. 

« The executive program displays a 4-digit mem^ory address followed by a space and the 2- 
digit contents of that memory address. The memory address displayed will be the current 
value of the program counter, which on initial start-up will be 1800, the first address of 
RAM. 

Operation from the TTY keyboard is the same as from the executive program keypad/display, 
except for the following differences. 

Half Duplex - h 

Normally the TTY executive program assumes that the terminal is running in full-duplex 
mode, therefore the executive program prints out each character as it is typed in. In the half- 
duplex mode, characters that are typed in will not be printed out. However, every time the h 
key is typed, the executive program switches from either half- or full-duplex to full- or half- 
duplex operation. 

Initialize — i 

The i key causes the memory to be set up and the header message and location 1800 are 
displayed. 

Terminate TTY - Break Key 

Pressing the break key, turning off the terminal, or unplugging the terminal will stop TTY 
operation and return control to the keypad/display. 

Memory Address — * 

Pressing the * key causes the executive program to set up to start displaying memory locations, 
and the memory address is set to the current value of the program counter. 

After typing in the * followed by an optional address, a carriage return causes that memory 
address and its contents to be displayed at the terminal. For example, to examine locations 
8003, 1900, and 1800 (in that order), refer to Table 4-6. 



4-7 



MAC Tutor Software 



PA-800515 

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TABLE 4-6. MEMORY ADDRESS LOCATION (TTY) EXAMPLE STEPS 



User Type Input 


Output 


*3'cr' 

*1234123111900'cr' 

*'cr' 


1800 DC 
8003 FF 
1900 8F 
1800 DC 



Table Notes: 

1. It is required to only type in as few digits as are necessary to generate the proper address. (The digit 3 was 
sufficient to convert the address 1800 into 8003.) 

2. The TTY executive program requires (at most) the last four digits to be typed. If a mistake is made, it can be 
corrected simply by typing in all the proper digits. 

3. An * alone is sufficient to bring back the current value of the program counter. 



Register Pointer — r 

This key operates in a manner similar to the *. The diflference is that the memory address is 
set to the bottom of the stack, which is where the register pointer is stored. As soon as the r 
key is typed, the address of the bottom of the stack is displayed, along with the contents of that 
location, the low byte of the register pointer. Refer to Table 4-7. 

TABLE 4-7. REGISTER POINTER (TTY) EXAMPLE STEPS 



User Type Input 


Output 


r 
'cr'* 


1800 DC 
1BB9 CO 
IBBA IB 



Register Display — / 

This key sets up the executive program to display the contents of one of the operating registers. 
After pressing the / key, either the character a or b must be typed, indicating whether examina- 
tion of the 8-bit a registers or 16-bit b registers is desired. Next, one of the digits through F 
should be typed to indicate which particular register is to be examined. If more than one digit 
is typed, the executive program will use the last one to specify which register is desired. After 
the type is entered and the proper register is selected, a carriage return will cause that register 
to be displayed. For example, to examine registers alO, bl5, aO, and a9, refer to Table 4-8. 

TABLE 4-8. REGISTER DISPLAY (TTY) EXAMPLE STEPS 



User Type Input 


Output 




1800 DC 


/aA'cr' 


AA 01 


/Bfcr' 


BF 56D4 


/'cr' 


AO FD 


/A0123456789'cr' 


A9 99 



Display Next Location — Carriage Return 

In order to examine a successive location, a carriage return (cr) key typed alone on a line will 



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MAC Tutor Software 



cause either the next higher memory location or register to be displayed. If the current register 
number is 15, the cr key will cause register to be displayed. For example, to examine 
memory locations 1900 through 1903, registers al5 through a3, and registers bl5 and bO, refer 
to Table 4-9. 

TABLE 4-9. DISPLAY NEXT LOCATION (TTY) EXAMPLE STEPS 



User Type Input 


Output 




1800 DC 


*1900'cr' 


1900 00 


'cr' 


1901 11 


'cr' 


1902 22 


'cr' 


1903 33 


/afcr' 


AF FF 


'cr' 


AO 00 


'cr' 


Al 11 


'cr' 


A2 22 


'cr' 


A3 33 


/BF'cr' 


BF OFFF 


'cr' 


BO 1200 



Display Previous Location — Line Feed 

In contrast to the carriage return, the line feed (If) key causes the next lower memory location 
or register to be displayed. Otherwise, the If and cr keys operate in the same manner. For 
example, to display memory locations 1800 through 17FE, registers al through al4, and regis- 
ters bl4 through bl, refer to Table 4-10. 

TABLE 4-10. DISPLAY PREVIOUS LOCATION (TTY) EXAMPLE STEPS 



User Type Input 


Output 




2FCD FF 


*1800'cr' 


1800 DC 


'If 


17FF FF 


'ir 


17FE FF 


/Al'cr' 


Al 11 


'ir 


AO 00 


'ir 


AF 11 


/BE'cr' 


BE OEEE 


'cr' 


BF OFFF 


'cr' 


BO 0000 


'cr' 


Bl 0111 



Change Contents 

If an input line consists of nothing but hexadecimal digits followed by either a cr or If key, the 
digits are collected into one number. Then when the cr or If key is typed, the rightmost two 
digits are stored into the currently displayed memory location or a register, or the rightmost 
four digits are stored into the currently displayed b register. If fewer digits than necessary to fill 
up a memory location or register are typed, the leftmost digits are assumed to be zero. For 
example, to store 59, 00, and 18 into memory locations 1800, 1802, and 1804; FF, 0, and 1 
into registers al5 to al; and 1, 1000, and FACE into registers b8 through blO,- refer to Table 
4-11. 



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TABLE 4-11. CHANGE CONTENTS (TTY) EXAMPLE STEPS 



User Type Input 


Output 




BADD FF 


*1800'cr' 


1800 DC 


59 'cr' 


1801 11 


'cr' 


1802 22 


O'er' 


1802 33 


18*1803'cr' 


1803 33 


'cr' 


1804 44 


18'cr' 


1805 55 


/AF'cr' 


AF FF 


'cr' 


AO FF 


O'er' 


Al 11 


I'cr' 


A2 22 


/B8'cr' 


38 0888 


I'cr' 


B9 0999 


lOOO'cr' 


BA OAAA 


01234FACE'cr' 


BB OBBB 



Table Notes: 

1. Something has to be currently displayed before it can be changed. 

2. The change does not take effect until the er or If key is depressed. This gives the ability to check the input for 
errors before making a change. If a mistake is made, start typing the desired number from scratch until the proper 
number is in the rightmost digit position. 

3. If it is not desired to change a displayed value, type in a cr or If key to skip over that location without affecting it. 



Program Execution — g 

The g key signals that the current memory location is the first address of some executable code. 
When the cr key is typed, the executive program starts execution at this address. The current 
memory location can be specified on the same line as the g command, so that the sequence 
*1800gcr would cause the MAC Tutor to start executing the program at location 1800. In order 
to avoid trying to execute a register address or other strange problems, it is recommended that 
program execution start with *, followed by a 4-digit starting address, followed by g command, 
and terminated with cr. 

Single Step — s 

The s key operates in the same manner as the g key, except that it only executes one instruc- 
tion. 

The s key also causes one instruction to be executed without waiting for a cr to be typed. After 
the instruction is completed, the header message is typed out, followed by the address of the 
next instruction to be executed and the contents of that memory location. 

Since the address of the next instruction is the current address, a program can be single-stepped 
many times by merely using the s key. Since the * key sets the current memory location to the 
value of the program counter, it is easy to single-step a program for a while, look at memory 
locations or registers, then continue single-stepping or executing the program. Refer to Table 
4-12 for an example that will single-step a program through two instructions, look at some 
registers and memory locations, and then restart execution at the third instruction of the pro- 
gram. 



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MAC Tutor Software 



TABLE 4-12. SINGLE-STEP (TTY) EXAMPLE 



User Type Input 


Output 




2000 FF 


* 1900s 


MAC Tutor Exec 1.0 




1902 7F 


s 


MAC Tutor Exec 1.0 




1903 59 


/bO'cr' 


BO 0000 


'If 


BF FFFF 


/AF'cr' 


AFFF 


*1904'cr' 


1904 00 


'cr' 


1905 18 


*g'cr' 





Table Note: Although the last memory location displayed was 1905, the g command caused execution to resume at 
location 1903. Recall that the * key causes the current memory address to be set to the current value of the program 
counter, which in this example was left at 1903. 



Talk to Host Computer — ! 

When the ! key is pressed, the TTY executive program connects a modem interface to allow 
communication with a time-sharing computer. If another ! is typed, the connection between 
the terminal and modem is broken and the connection is once again made with the MAC 
Tutor. (This sequence can be repeated as many times as desired.) 

Load Hex File — 1 

If access to a time-sharing computer is available, the TTY executive program has the ability to 
load programs developed on that computer into the MAC Tutor mem.ory. When the 1 key is 
typed, the TTY executive program will load a standard hex. file. 

4.2.4 System Utilities 

Certain routines have been created that utilize MAC Tutor features. All of these routines are 
executed as if they were user programs that were loaded into memory. However, because these 
routines are part of the ROM executive, they are always available and unmodifiable. These 
routines are invoked by setting certain registers to indicate what is desired, then executed with 
the keypad go button or terminal g key. Refer to 4.4 for routine details. 

4.3 Programming 

There are basically three ways to create programs for the MAC-8: 

» Hand Coding. Pencil and paper are used to create each byte of each instruction in the pro- 
gram. 

• Assembler. Assembly language programs can be created on a UNIX* time-sharing system. 
These programs can then be loaded into memory and executed on the MAC Tutor. 

• C Compiler. A UNIX system can be used to create 
programs in the C programming language. 



UNIX is a trademark of Bell Laboratories. 



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PA-80051 5 

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4.4 Available Programs 

The following descriptions include the starting address on the title line, input parameters, con- 
straints, and abnormal conditions. 

4.4.1 Move Memory - *022F 

This routine moves a copy of a block of memory from one place to another. The input consists 
of setting registers b8, b9, and b 10 as follows: 

• b8 The address of where to move the block of memory. 

• b9 The address of the first location to move. 

• blO One more than the last address that is to be moved. 

For example, to move a copy of everything in locations 1900 through 19FF to locations 1800 
through 18FF, refer to Table 4-13. 

TABLE 4-13. MOVE MEMORY EXAMPLE STEPS 



User Type Input 


Output 




1800 DC 


/B8'cr' 


B8 0888 


1800'cr' 


B9 0999 


1900'cr' 


BA OAAA 


lAOO'cr' 


BB OBBB 


*022Fg'cr' 


MAC Tutor Exec 1.0 (cr) 




1800 00 



Table Note: If the "to" address is greater than the "from" address and the blocks overlap, only the locations between 
these two addresses will be moved properly. All the rest of the destination block will consist of repetitions of this small 
block. 



4.4.2 Write a PROM - *0541 

This program writes the contents of any contiguous 1024-byte block of memory into a 2708 
PROM. The program that writes the PROM uses register and stack space in the upper 1024- 
byte block of RAM (starting address 1800); therefore, it is not possible to successfully program 
an entire 2708 PROM unless the lower 1024-byte block of RAM (starting address 1400) is 
used to contain the program to be written. This restriction is not too severe, since approximately 
the first 950 bytes in the upper 1024-bytes of RAM (starting address 1800) can be written into 
the PROM. 

The only input required consists of setting register b9 to the starting address of the block of 
1024-bytes of RAM to be written into the 2708 PROM. It takes approximately two minutes to 
write the PROM. 

When the program is complete, it indicates whether or not the PROM is correctly written by 
setting registers bl3 and bl4 to the following values: 

bl3 If the lower 1024-bytes of RAM (starting address 1400) were used, this register con- 
tains 400 if the PROM is written correctly. If incorrectly written, bl3 will contain a 
number from 0000 to 03FF, indicating the first location in the PROM that is in 
error. If the upper 1024-bytes of RAM (starting address 1800) were used, bl3 
should contain at least 03b9. 



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bl4 If bl3 does not contain 400, then the left two digits in bl4 are what should have 
been stored in the PROM at the location specified by bl3. The right two digits in 
bl4 show what is actually there. 

To write locations 1000 to 1400 into a PROM that has been placed in the PROM programming 
socket, refer to Table 4-14. 



TABLE 4-14. WRITE PROM LOCATIONS EXAMPLE STEPS 



User Type Input 


Output 


/B9'cr' 

lOOO'cr' 

*0541g'cr' 


1800 DC 
B9 1234 
BA 5678 



4.4.3 Verify a PROM - *057B 

This program verifies that the contents of the PROM match what is in a block of memory. The 
only input is to set register b9 to the beginning address of a 1024-byte block of memory. 
(Since a blank PROM and nonexistent memory both contain FF, a PROM can be zero verified 
by specifying a nonexistent block of memory, such as 2000.) 

TTuwii \^win^»icic, iiic ^lugiaiii iiiuicctica iiic icsuiis vi iiic vciuiuauuii upciaiiuu oy iiciiiiig regis- 
ters bl3 and bl4 as follows: 

• bl3 If this register contains 400, the 1024 bytes in the PROM are the same as the 

1024 bytes in memory. If the register does not contain 400, it will contain a 
number from to 3FF, indicating the first location in the PROM that did not 
match. 

• bl4 If register bl3 does not contain 400, the left two digits of register bl4 indicate 

what was stored in the PROM. The right two digits are in memory. 

To check whether the contents of locations 1800 to IBFF are the same as what is in the 
PROM, refer to Table 4-15. 



TABLE 4-15. VERIFY PROM CONTENTS EXAMPLE STEPS 



User Type Input 


Output 


/B9'cr' 

1800'cr' 

*057Bg'cr' 


1800 DC 
B9 1234 
BA 5678 



4.4.4 Dump to Audio Tape - *06C6 

This routine dumps a block of memory to an audio tape file. The input consists of: 

• a8 File ID, a unique number from 1 through FE identifying this file. It is recom- 

mended that IDs O and FF not be used. 

• b9 The address of the first location to be stored on the tape. 



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• blO One more than the last address to be written onto the tape. 
The sequence of events necessary to write a file out to tape is: 

• Set registers a8, b9, and blO. 

• Start tape recorder and set to record mode. 

• Wait until tape leader has been skipped. 

• Execute the tape dump program. 

• Stop the tape recorder when the program is completed. 

Note: While the program is executing, the leftmost digit of the LED display indicates what is 
happening. For the first 5 seconds it will show two vertical bars, the right bar being one-half 
the height of the left bar (this indicates that the 100 sync characters which begin every file are 
being written out). After this is completed, the right two vertical segments should be lighted, 
the top horizontal segment should be off, and all other segments should flicker (this indicates 
that data is being written out to the tape). If the display indicates a pattern of bars with none 
of the segments varying, one of two things has happened: 

• All the data to be stored on tape is the same. This situation is possible, but rather 
unlikely. 

• The data being written out are all Fs. This was probably caused by putting the wrong 
starting address in b9 and writing out a nonexistent program. 

To store locations 1000 to 13FF on tape using the file ID 10, refer to Table 4-16. 
TABLE 4-16. TAPE STORE LOCATION EXAMPLE STEPS 



User Type Input 


Output 


User Action 




1800 DC 




/B8'cr' 


B8 1234 




OOlO'cr' 


89 5678 




lOOO'cr' 


BA 9ABC 




1400'cr' 


BB DEFO 




♦06C6g'cr' 


MAC Tutor Exec 1.0 


Start tape recorder. 




1800 DC 


Skip leader. 

Stop tape recorder. 



4.4.5 Read from Audio Tape - *05EE 

This routine reads information stored on tape back into MAC Tutor memory. The input con- 
sists of: 

• a8 File ID of data to be read in from tape. 

• b9 Address of the first location to be stored in memory. (This parameter is used only 

if the file ID is FF.) 

Since special meanings have been assigned to certain file IDs, actions will take place as follows: 

• The next file on the tape will be read into the address stored as part of the file. 

• 1-FE The first file with the same ID as this will be read into the address stored as part 

of the file. 



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• FF The next file on the tape will be read into the address specified in register b9. 
The following steps are required to read in a file from tape: 

• Set register a8 and possibly register b9. 

• Start execution of the tape load program. 

• Start tape recorder. 

• Upon completion of program, stop tape recorder. 

As with the dump program, the leftmost digit of the LED display gives some indication of what 
the program is doing. If the display is a random pattern that does not change or only changes 
very slowly every one or two seconds, the program is waiting for the next data file to appear. If 
there are two vertical bars (the right one half the height of the left one), the 100 sync charac- 
ters that begin a data file are being read. The data file is actually being loaded when the right 
two vertical segments are lighted, the top horizontal segment is off", and all other segments are 
flickering too fast to be understood. 

The program can detect the following types of errors: 

• Vertical parity error. A parity bit is stored with each character in the data file to enable 
detection of a change in one bit of the character. 

• Longitudinal checksum error. The last character of a file, called a checksum, gives the tape 
load program one more way of checking that a file is read in properly. 

When the tape load program terminates, register bl4 contains the number of vertical parity 
errors in the upper two digits. The lower two digits contain the computed checksum for the 
file. If register bl4 contains all zeros, no errors were detected. If register bl4 has no zeros, 
data that was read in should be viewed with suspicion. An error has occurred but there is no 
way to determine where it has occurred. 

The tape read program will ignore anything on the tape that it does not recognize as a data file. 
As a result, a short voice description of a data file can precede that file on the tape without 
causing any problems for the load program. 

For example, if a data file with file ID 53 has been stored on tape, refer to Table 4-17 to read 
that file back. 

TABLE 4-17. TAPE READ EXAMPLE STEPS 



User Type Input 


Output 


User Action 




1800 DC 




/A8'cr' 


AS 12 




53'cr' 


A9 34 




*05EEg'cr' 


MAC Tutor Exec 1.0 
1800 DC 


Start tape recorder. 


/BE'cr' 


BE 0000 


Stop tape recorder. 



Table Note: The tape can be started from the very beginning and the program will skip everything until it comes to the 
right file. It is also possible to manually position the tape with the fast forward and rewind controls to just before the 
desired file. If the position of the file is known, either through voice information on the tape or tape recorder counter, 
this technique can be used to speed up tape file processing. 



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4.5 Testing and Diagnosing 

MAC Tutor testing and diagnosing approaches consist of: 

• Self-test program 

• Truth table excitation 

• Manual logic analyzer 

The self-test approach consists of running a program that checks out each portion of the MAC 
Tutor. This program requires that a set of straps be plugged into the I/O and PROM program- 
ming sockets. Then, by feeding the outputs to the inputs of the various elements, the program 
verifies the operation. 

The truth table excitation approach makes use of a logic tester to excite the various elements in 
the MAC Tutor and to logically compare the appropriate outputs. This test requires that the 
MAC-8 be removed from the socket and the logic tester be connected to the MAC-8 and I/O 
sockets. 

The third approach for testing and diagnosing the MAC Tutor is through the use of a logic 
analyzer (e.g., Hewlett-Packard Model 1600A or equivalent). The address and data buses are 
available for monitoring purposes at connectors Jl and J2. Through the use of the memory 
map shown in Table 4-18, the read and write cycles for the various memory devices can be 
monitored and verified. Typically, the first items that are checked out involve the integrity of 
the control signals to and from the MAC-8. These include the reset, memory read, memory 
write, and clock signals. If these signals check out, the ROM, RAM, and I/O follow in 
sequence. These are checked out by determining the integrity of the chip select signal of these 
devices and the data bus contents. 

TABLE 4-18. ADDRESS ASSIGNMENTS/ MEMORY MAP 



Dev ice 


Physical 
Location 


AI5 


AN 


A13 


AI2 All 


Aid 


A4 A3 A2 Al All 


Hex 
Addresses 


- - - 


-- - 













-— 





32AG ROM 1 
32AAF ROM ' 


NOl 














X 




0000-07 FF 


2708 PROM 


.KOI 











1 







0800-OBFF 


2708 PROM 


GOl 











1 


1 




OCOO-OFFF 


2708 PROM 


DOl 











1 







1000-13FF 


9131 RAM 


D05-K05 











1 


1 




1400-1 7FF 


9131 RAM 


G05-N05 











1 1 







1800-1BFF 


8255 I/O 


D24 











1 1 


1 





1F00-1F03 


8255 1/0 


D16 











1 1 


1 


1 


1F04-1F07 


8255 1/0 


D20 











1 1 


1 


1 


1F08-1F0B 


74LS273 1/0 


CIO 











1 1 


1 


110 1 


IFOD 


74LS273 1/0 


C13 











1 1 


1 


1110 


IFOE 



Table Notes; 1. X designates either logical 1 or Blank areas 
indicate future expansion. 

2. Unit comes equipped with one of the two listed ROMs. 



4-16 



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Issue 2, July 1979 Glossary 



Chapter 5 
GLOSSARY 



Glossary 



PA-800515 

Issue 2, July 1979 



5. GLOSSARY 

Addend 



A number lo be added to another. 



Addressing Mode 



A way of forming the effective memory 
address (es) for the operand (s) in an instruc- 
tion. 



Architecture 



A design or orderly arrangement of a micropro- 
cessor. 



i\ QuaniiLy lo wnicn an aaaeno is aaaea= 



Autobaud 



To automatically adjust to a given baud rate. 



Baud Rate 



A measure of data flow. The number of signal 
elements per second based on the duration of 
the shortest element. When each element car- 
ries one bit, the the baud rate is numerically 
equal to bits per second (bps). 



Bit 



A binary digit (logical 1 or 0). 



Byte 



A sequence of adjacent binary digits (usually 
shorter than a word) operated on as a unit. 
Sometimes referred to an 8-bit byte. 



C Compiler 



A unit that translates C language source pro- 
grams into machine language codes. 



Central Processing 
Unit (CPU) 



The heart of any computer system. A basic 
CPU consists of an arithmetic and logic unit, 
control block register array, and input/output. 



5-1 



Glossary 



PA-800515 

Issue 2, July 1979 



Checksum 



The last character of a data file that is used for 
error detection purposes. 



Clock 



A pulse generator that controls the timing of 
microprocessor switching circuits. 



Command 



The portion of an instruction that specifies the 
operation to be performed. 



C Program 



An organized set of instructions written in the 
C programming language. 



CPU 



See Central Processing Unit. 



Data Bus 



A group of lines each capable of transferring 
one bit of data. It is bidirectional and can 
transfer data to and from the CPU, memory 
storage, and peripheral devices. 



Debug 



To search for and eliminate errors in a comput- 
er program. 



Decrement 



A programming instruction that decreases the 
contents of a storage location. 



DIP Connector 



Dual In-line package connector. 



Dump 



To transfer the contents of memory to an out- 
put device. 



Dyadic (deration 



An operation performed using two operands, 
the source and destination. 



EPROM 



See Erasable Programmable Read-Only Memory. 



Erasable Programmable 
Read-Only Memory (EPROM) 



Usually consists of a mosaic of undifferentiated 
cells that is electrically reprogrammable and 
erasable by ultraviolet irradiation. 



5-2 



PA-800515 

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Glossary 



Fetch 



To obtain data from a memory location. Read- 
ing an instruction from memory and entering it 
in the instruction register is often referred to as 
an instruction fetch. 



Frequency Shift 
Keying (FSK) 



A form of frequency modulation in which the 
modulating wave shifts the output frequency 
between predetermined values (usually called a 
mark and space) . 



FSK 



See Frequency Shift Keying. 



Hardware 



The electrical, mechanical, electronic, and mag- 
netic components of a computer. 



Hexadecimal 



Whole numbers and letters in positional nota- 
tion using the decimal number 16 as a base. 
The least significant hexadecimal digits read: 
0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F. 



Increment 



A programming instruction that increases the 
contents of a storage location. 



Input/Output (I/O) 



Package pins connect directly to the internal 
bus network to interface the microprocessor 
with the "outside world." 



Interface 



A common boundary between adjacent com- 
ponent circuits or systems enabling the devices 
to yield or acquire information from one anoth- 
er. (Buffer, handshake, and adapter are used 
interchangeably with interface.) 



Interrupt 



Suspension of the normal programming routine 
of a microprocessor in order to handle a sudden 
request for service. 



I/O 



See Input/Output. 



LED 



Light-emitting diode. 



5-3 



Glossary 



PA-800515 

Issue 2, July 1979 



Memory 



Core, disk, drum, or semiconductor systems 
into which information can be inserted and held 
for future use. (Memory and storage are inter- 
changeable terms.) 



Microprocessor 



A central processing unit fabricated on one or 
two chips consisting of arithmetic and logic 
unit, control block, and register array. The in- 
puts and outputs of the associated sections are 
joined to a memory storage system. 



Modem 



An acronym for modulator-demodulator. A 
device that converts data to a form that is com- 
patible between data processing and transmis- 
sion equipment. 



Monadic Q>eration 



An operation performed using only one 
operand. 



Opcode 



An acronym for operation code; that part of the 
coded instruction designating the operation to 
be performed. 



Operand 



A quantity of data in which an operation is per- 
formed; usually one of the instruction fields in 
an addressing statement. 



Peripheral 



Auxiliary function 
computer control). 



(devices not under direct 



PPI 



See Programmable Peripheral Interface. 



Program 



A procedure for solving a problem. Frequently 
referred to as software. 



Programmable Peripheral 
Interface (PPI) 



An integrated circuit that can be programmed 
to interface with a variety of peripheral equip- 
ment. 



Programmable Read-Only 
Memory (PROM) 



A programmable mosaic of undifferentiated 
cells. Program data is stored in the PROM. 



5-4 



PA-800515 

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Glossary 



PROM 



See Programmable Read-Only Memory. 



Pushdown Stack 



A register array used for storing and retrieving 
data on a last-in, first-out basis. 



RAM 



See Random-Access Memory. 



Random- Access 
Memory (RAM) 



Memory in which access to any storage location 
is provided immediately by means of vertical 
and horizontal coordination. Information can 
be "written in" or "read out" m the same rapid 
manner. 



Read-Only Memory (ROM) 



A storage device in which stored data cannot be 
altered by computer instructions (sometimes 
called firmware). 



Register 



A device for temporary storage of one or more 
bits involved in arithmetical, logical, or 
transferral operations. The number of registers 
in a microprocessor is considered one of the 
most important architecture features. 



ROM 



See Read-Only Memory. 



Routine 



A sequence of instructions for performing a 
particular task. 



Single-Step 



A command that executes only one instruction 
at a time. 



Software 



The internal programs or routines prepared to 
simplify computer operations. Software permits 
the programmer to use a language such as C or 
mathematics to communicate with a computer. 



Storage 



Any device that retains information. The word 
storage is used interchangeably with memory. 



5-5 



Glossary 



PA-800515 

Issue 2, July 1979 



Subroutine 



Part of a master routine that can be used at will 
to accomplish a specific task (the object of a 
branch or jump command). 



Teletypewriter (TTY) 



The teletypewriter uses electromechanical func- 
tions to generate codes (Baudot) in response to 
manual inputs from a typewriter keyboard. 



Transistor- Transistor 
Logic (TTL) 



A logic-circuit design method that uses inputs 
from multiple emitter transistors. Sometimes 
referred to as multiemitter transistor logic. 



TTL 



See Transistor-Transistor Logic. 



TTY 



See Teletypewriter. 



Word 



A number of bits that are treated as one unit, 
where the number depends on the CPU. 



5-6 



PA 800515 RESIDENT EXECUTIVE PROGRAM 

Issue 2, July 1979 



APPENDIX 
RESIDENT EXECUTIVE PROGRAM 



♦define 


lOPAGE 


017400 


♦define 


PCNTRL 


*(b11 + 3) 


♦define 


QCNTRL 


♦ (b11 + 7) 


♦define 


PAIO 


*b11 


♦define 


PBIO 


*(b11 + 1) 


♦define 


PCIO 


*(b1 1 + 2) 


♦define 


PDIO 


*(b11 + 4) 


♦define 


SETMOD 


0200 


♦define 


AINP 


020 


♦define 


BINP 


02 


♦define 


CINP 


011 


♦define 


CLINP 


01 


♦define 


CUINP 


010 


♦define 


DINP 


010 



♦define SSTKEY 24 

♦define NOKEY 28 

♦define OFFDIG 15 

♦define ALLDIG 0177400 

♦define KDOWN 2 



♦define 


BAUD 


♦015776 








♦define 


NUMDEL 


3 








♦define 


SSTDEL 


Ox7f 








♦define 


RAMORG 


0x1800 








♦define 


RAMLEN 


04000 








♦define 


SYSREG 


OxIbeO 








♦define 


USERRG 


OxIbcO 








♦define 


USERB11 


♦0 15726 


/♦ 


0x1 bd6 


♦ / 


♦define 


USERB 1 2 


♦0 15730 


/* 


0x1 bd8 


♦ / 


♦define 


USERB13 


♦0 15732 


/* 


0x1 bda 


♦ / 


♦define 


USERB 14 


♦0 15734 


/♦ 


0x1 bdc 


♦ / 



♦define NBIT 



50 



♦define A 
♦define B 



10 
11 



♦define STARTCH '♦' 
♦define ENDCH '/' 
♦define CHECKSUM Ox 2 a 
♦define EOT 00 4 
♦define SYNC 02 6 



/♦ -♦' */ 



♦ define BIT1 24«8 

♦define BITO 12<<8 

♦define CYCLEO 13 

♦define CYCLE 1 6 

♦define NOISE 040 



12 
12 



int USERB11; 
int USERB 12; 



A-1 



77A 


7E 


30 


60 


79 




77E 


33 


58 


5F 


70 




782 


7F 


73 


77 


IF 




786 


00 


30 


4F 


47 




78A 


18 


14 


10 


OC 




78E 


OD 


OE 


OF 


19 




792 


15 


1 1 


08 


09 




796 


OA 


08 


1A 


16 




79A 


12 


04 


05 


06 




79E 


07 


18 


17 


13 




7A2 


00 


01 


02 


03 




7A6 


65 


01 


E2 


01 


FO 01 


7AC 


01 


01 








7AE 


OE 


01 


OE 


02 


A7 01 


784 


C3 


01 








786 


FE 


01 


15 


02 


15 02 


78C 


29 


00 








78E 


44 


02 









int USER813; 
int USERB14; 

int 8AU0; 

_ASSEM "BAUD » 15776"; 

_ASSEM "PCNTRL = 17403"; 

ASSEM "OCNTRL = 17407" ; 

ASSEM "PAIO X 17400" 
_ASSEM "PBIO = 17401" 

ASSEM "PCIO = 17402" 

ASSEM "PDIO = 17404" 



char tfmt[] 



char tnum[] 



int tfnc[] 



{ 0176, 0060, 0155, 0171 } 

{ 0063, 0133, 0137, 0160 } 

{ 0177, 0163, 0167, 0037 } 

{ 0015, 0075, 0117, 0107 }; 



{ 24, 20, 16, 12 } 

{ 13, 14, 15, 25 } 

{ 21, 17, 8, 9 } 

{ 10, 11 , 26, 22 } 

{ 18, 4, 5. 6 } 

{ 7. 27, 23, 19 } 

{ 0, 1 , 2, 3 }; 



{ Snumb, Aplus, Sminus, Sstar } 

{ Sequal, &exec, Sareg, Sbreg } 

{ &rptr, &sst, &sst , SinitO } 

{ &tty }; 



Mac8 Tutor Executive 

Global memory allocation 

+ + 

1BFE !~ b15 —1 

+ + 

!— bi4 —I 

+ + 

I— bi3 — ! 

+ + 

1 + 

! ai2 ! 

+ + 

I— bii — ! 

+ + 



BAUD rate counter 

contents of (b13) 

current address 

on digits f lags 
exec state flags 

address of 10 page 



A-2 



» 1BE0 1 — 

* + 

* 1 BDE ! — 

* + 



bO 



bi5 



— + 



<- rp 



user rcg i sters 



1BC0 



bO 
initO 

en 



— User PC 
User rp 



+ - 
1400 1 
+- 



<— user pp 

return address to exec 



-+ <- sp 

Stack 
-+ 



Oni gi n of RAM 



ma i n (. ) 

{ 






7F 












nop( ); 


1 


7F 












nop ( ) ; 


2 


7F 












nop ( ) : 


3 


58 


03 










goto If; 


S 


59 


00 


08 








goto *0x800; 


8 


47 










1 : 


puGh(rp) ; 


9 


40 


OF 


EO 


IB 






rp = SY5REG; 


D 


CO 


BF 


00 


IF 






b11 = lOPAGE: 


11 


82 


BF 


07 


8B 






OCNTRL = 0213; 


15 


82 


BF 


04 


FF 






PDIO = 0377; 


19 


82 


BF 


03 


93 






PCNTNL = 0223; 


ID 


86 


OB 


02 








aO = PCIO; 


20 


52 


03 


31 








if ( !bi t(3,a0) ) goto If; 


23 


7F 












nop ( ) : 


24 


59 


F4 


07 








goto powon ; 


27 


60 


FO 








reset : 


bl5 = 0; 


29 


CI 


FF 


D6 


IB 


00 IF 


ini to: 


USER311 = IOPAGE; 


2F 


CI 


FF 


D8 


16 


02 FF 




USERB12 = ALLDIG i KDOWN; 


35 


4D 


OF 


EO 


IB 




ini t : 


rp = SYSREG; 


39 


CO 


BF 


00 


IF 






b11 = IOPAGE; 


3D 


OD 


OF 


69 


IB 






Sp = USERRG - 2 - 1 - 2 - 2 


41 


C2 


FF 


05 


35 


00 




*(dsp + 5) = &i ni t ; 


46 


22 


FO 


04 








♦(sp + 4) =0; 


49 


C2 


FF 


02 


00 


18 




*{dsp + 2) = RAMGRG; 


4E 


C2 


FF 


00 


CO 


16 




*(d-.p + 0) = uSERRG; 


53 


82 


BF 


03 


90 




1 : 


PCNTRL = 0220; 


57 


82 


BF 


02 


10 






PCIO » 020; 



A-3 



58 


C6 


OF 


02 




5E 


C5 


ED 






60 


CO 


CF 


00 


FF 


64 


01 


02 






66 


C5 


OF 


FE 


IB 


6A 


61 


F1 


44 


02 


6E 


79 


AC 


00 




71 


80 


OF 


18 




74 


48 


F1 


04 




77 


80 


CF 


02 




7A 


79 


OF 


00 




7D 


79 


AC 


00 




80 


80 


OF 


1C 




83 


40 


F1 


06 




86 


98 


CF 


FD 




89 


58 


EF 






88 


5A 


CI 


ED 




8E 


90 


CF 


02 




91 


80 


OF 


OF 




94 


40 


F9 


07 




97 


CO 


20 






99 


CO 


OF 


OF 


00 


90 


AO 


OF 


OF 




AO 


30 


01 






A2 


E8 


OF 


A6 


07 


A6 


C5 


30 






A8 


69 


3F 






AA 


58 


CE 







man2 



AC 


82 


BF 


03 


82 


80 


82 


BF 


07 


98 


84 


CO 


OF 


F9 


00 


88 


80 


3F 


EF 




88 


A8 


OF 


07 




BE 


34 


3F 






CO 


65 


00 






C2 


81 


B3 






C4 


86 


4B 


04 




C7 


98 


4F 


7F 





bl3 = *{dsp + 2) ; 

bl4 = *d13; 

bl2 = ALLDIG; 

set (zero); /* mac7 hardware error */ 

bO = BAUD; 

if ( Izero) tty( ) ; 

rdkey( ) ; 

aO - SSTKEY; 

i f ( zero) goto 1 f ; 

al2 = KDOWN; 

disp( ); 

rdkey( ) ; 

if (aO == NOKEY) { 

a12 =& 0375; 
goto lb; 

} 

if (bit(1 ,al2) ) goto 1b; 

al2 =1 KDOWN; 

if (aO <= 15) { 

b2 = bO; 

bO = 15; 
} 

aO =- 15; 
aO =* 2; 
bO =+ atfnc; 
b3 = *dO; 
*b3(); 
goto lb; 

rdkey - read keyboard 

entry - entry •- none. 

uses - a 0,1,3 
b 0,1 

cal Is - none. 

exit - aO = number from to 27 indicating 
which key was pressed. 



rdkey( ) 
{ 



PCNTRL = 0202; 

OCNTRL = 0233; 

bO = (-7)60377; 

a3 = 0357; 

aO =4 7; 

a3 =>>> 1 ; 

if ( \ neg) return ; 

PAIG = n3; 

a4 = POrO; 

a4 '& 0177; 



A-4 



CA 88 4F 7F a4 =~ 0177; 

CD 48 F1 EC if (zero) goto lb; 

DO OC 14 ai = fiQ(34); 

D2 28 18 — a1 ; 

D4 A8 w1 30 --r- si ; 

D6 CO 1 F 8A 07 b1 = Stnum; 

DA 75 10 bl =+ logical (aO) ; 

DC 85 01 aO = *bl ; 

DE 66 return; 



DF 


7F 








EO 


82 


BF 


07 


8B 


E4 


22 


BO 


04 




E7 


82 


BF 


03 


90 


EB 


6A 


CO 






ED 


20 


20 






EF 


CO 


OD 






F1 


79 


07 


01 




F4 


CO 


OE 






F5 


79 


07 


01 




F9 


CO 


5F 


03 


00 


FD 


79 


5D 


01 




100 


82 


BF 


01 


OF 


104 


6A 


CO 






106 


66 









/* disp - display numbers in 7-segment displays 

* 

* entry - a12(15-8) = bit mask indicating on 

* digits. 

* bl3 = first four digits to display 

* b14 = last four digits 
* 

* uses - a 0,2,5 

* b 0,5 
* 

* calls - dsp4, delay. 

* exit - 7-segment displays refreshed. 

* 

disoC ) 

{ 

nop(); /* historical allignment */ 

QCNTRL = 0213; 

PDIO = 0; 

PCNTRL = 0220; 

swap(b12) ; 

a2 = 0; 

bO = bl3; 

dsp4(); 

bO = b14; 

dsp4( ); 

b5 = NUMDEL; 

delay( ) ; 

PBIO = OFFDIG; 

swap(b12) ; 

return ; 

} 

/* dsp4 - display 4 digits 
* 

* entry - bO = 16-bit number to display 

* 

* uses - a none. 

* b 

* cal Is - dsp2. 

* exit - next 4 digits displayed. 

dsp4( ) 



A-5 



107 


6A 


00 




109 


79 


12 


01 


IOC 


6A 


00 




10E 


79 


12 


01 


111 


66 







{ 

swap(bO) ; 

dsp2( ); 

swap(bO) ; 

dsp2( ); 

return; 
} 
/♦ clsp2 - display 2 digits 

* entry - aO = 8-bit number to display 

* uses - a 0,1, 2,3,5 

* b 3,5 

* cal Is - delay. 

* exit - next 2 digits displayed. 

* 

*/ 

dsp2( ) 

{ 

112 80 10 a1 = aO; 

114 38 IF al =» l; 

116 38 IF al =>> 1 ; 

118 38 1F al =» 1 ; 

11A 38 IF al =>> 1 ; 

lie CO 3F 7A 07 b3 = Atfrnf, 

120 75 31 b3 =+ logical(al); 

122 85 33 as = *b3; 

124 82 BF 01 OF PBIO = OFFDIG- 

128 34 CI al2 =<« 1; 

12A 40 F5 OE if (!odd) goto dp21: 

120 82 63 04 PDIO = a3 ; 

130 82 82 01 PBIO = a2 ; 

133 CO 5F 03 00 b5 = NUMDEL- 

137 79 5D 01 delayO; 

13A 28 20 dp2l : ■t-+a2; 

13C 98 OF OF aO =& 017- 

13F CO 3F 7A 07 b3 = &tfmt; 

143 75 30 b3 =+ logical(aO): 

145 85 33 33 = *b3; 

147 82 BF 01 OF PBIO = OFFDIG; 

148 34 CI al2 =<« i ; 

14D 40 F5 07 if (lodd) goto dp22; 

150 82 B3 04 PDiO = a3 ; 

153 82 B2 01 PBIO = a2 ; 
156 28 20 dp22: ++a2; 

158 66 return; 

} 

/• bitime, delay - delay specified time 

* entry - b5 * delay count (picked up from 

* BAUD by bi t ime) 

* 

* uses - a 5 

* b 5 



A-6 



159 


C5 


5F 


FE IB 


150 


01 


02 




15F 


68 


58 




161 


64 


00 




163 


58 


F8 





* calls- none. 

* exi t - eventual 1y . 

* 

*/ 
bi t i me( ) 

{ 

b5 = BAUD; 
delay: set ( zer-o) ; 

~b5; 

\ f ( neg) return : 

goto delay; 

/* numb = process hex number 
* 

* entry - a2 = nurr.ben keyed in 
« 

* uses - a 0,1,13,14 

* b 0, 13, 14 
* 

* cal 1 s - none. 

* exit - number shifted into the current 

* address or data field as required. 



*/ 
numb( ) 

{ 



165 


52 


CO 


12 


168 


5A 


C2 


21 


16B 


38 


El 




16D 


38 


El 




16F 


38 


El 




171 


38 


El 




173 


90 


E2 




175 


81 


DE 




177 


58 


11 




179 


5A 


C2 


3A 


17C 


CO 


00 




17E 


79 


3B 


02 


181 


CO 


DO 




183 


98 


OF 


FO 


186 


90 


02 




188 


C5 


ED 




16A 


66 






18B 


52 


C3 


OA 


18E 


CO 


OE 




190 


79 


3B 


02 


193 


CO 


EO 




195 


58 


08 




197 


38 


El 




199 


38 


El 




198 


38 


El 




190 


38 


El 





if (bit(0,al2)) { 

if (bit(2,al2)) goto chreg; 

a14 =<< 1 
a14 =<< 1 
a14 =<< 1 
a14 =« 1 

al4 =1 a2 
*b13 = a14; 



} else { 



if (bi t(2,al2) ) goto reg2 ; 

bO = b13; 

Shi f t4( ) ; 

b13 = bO; 

a13 =& 0360; 

a13 =1 a2; 

b14 = *dl3; 



} 



ret urn ; 

chreg: if (bit(3.al2)) { 

bO = b14; 

Shi f t4( ) : 

bl4 = bO; 

} else { 

a14 =<< 1 
a14 =<< 1 
al4 =<< 1 
ai4 =<< 1 



A-7 



} 

19F 90 E2 a14 =! a2; 

1A1 79 33 04 regadO; 

1A4 CI OE ♦dO = b14; 

1A6 66 return; 

} 



1A7 


DO 


CF 


04 


FF 


1AB 


DB 


CF 


F6 


33 


1AF 


CO 


DF 


AO 


00 


1B3 


20 


20 






1B5 


98 


2F 


OF 




IBS 


98 


DF 


FO 




1BB 


90 


D2 






1BD 


79 


33 


04 




ICO 


C5 


EO 






1C2 


66 









/* areg - set a register mode 

* entry - none. 

* 

* uses - a 0,2,12,13,14 

* b 0,12, 13 

* cal Is - none. 

* 

* exit - display set up for a-register display 

areg( ) 

{ 

b12 =1 ALLDIGI04; 

bl2 =& 031766; 

bl3 = A<<4; 
regl : a2 = 0; 
reg2 : a2 =& 017; 

al3 =& 0360; 

al3 =; a2; 

regad( ) ; 

bl4 = *d0; 

return ; 
} 

/* breg - set b register mode 
* 

* entry - none. 

* uses - a 12,13 

* b 12,13 

* Cal Is - areg. 
* 

* exit - display set up for b-register display. 

breg( ) 
{ 



1C3 DO CF OC FF bl2 =| ALLDIG;014; 

1C7 D8 CF FE 3F bl2 =& 037776; 

1CB CO DF BO 00 bl3 = B<<4; 

1CF 58 E2 goto regl ; 

} 

/* star - set address mode 
* 

* entry - none. 

* uses - a 12,13,14 

* b 12,13, 14 



A-8 



* cal Is - none. 

* 

t exit — d1spl3*' set up fo^ memory display and 

* all further numbers keyed into the 

* current user pc • 



1D1 


98 


CF 


F2 




1D4 


DO 


CF 


00 


FF 


1D8 


C6 


DF 


04 




1DB 


C5 


ED 






1D0 


66 









al2 =& 0362; 
bl2 =i ALLDIG; 
bl3 = *(dsp + 4) ; 
bl4 = x'dia; 
return; 



star( ) 
{ 



} 

/♦ equal - set data mode 
* 

* entry - none. 
* 

* uses = a 12 

* b none. 

* Cal Is - none. 
* 

* exit - all further number-s keyed 'i"> get 

* stored at the current address. 



IDE 90 CF 01 
1E1 66 



1E2 


52 


C2 


07 


1E5 


80 


2D 




1E7 


28 


20 




1E9 


58 


CA 




1EB 


68 


DO 




1E0 


C5 


ED 





equa 1 ( ) 
{ 



} 



al2 »! 1 ; 
return; 



/* plus - increment the current address 

* entry - bl3 = current address 
* 

* uses - a 2,13,14 

* b 2,13, 14 

* cal Is - none. 
* 

* exit - current address incremented and 

* addness/data mode unchanged. 

*/ 
plusO 

{ 

if ( !bit(2,al2) ) goto if; 

a2 -= al3; 
++a2 ; 

goto reg2 ; 
1: ++b13; 

bl4 = *d13; 



A-9 



1EF 66 return; 

} 



1F0 


52 


C2 


07 


1F3 


80 


2D 




1F5 


28 


28 




1F7 


58 


BC 




1F9 


68 


D8 




1FB 


C5 


ED 




1FD 


66 







1FE 


6F 


DF 


00 




201 


7D 


DF 


02 




204 


C5 


ED 






206 


DO 


CF 


00 


FF 


20A 


98 


CF 


F2 




20D 


66 









/* minus - decrement the current address 

* entry - b13 = current address 

* 

* uses - a 2,13,14 

* b 2,13, 14 

* cal Is - none. 

* 

* exit - current address decremented and 

* address/data mode unchanged. 

* 

*/ 
minus( ) 

{ 

if ( !bit(2,a12)) goto if; 

a2 = a13; 

— a2; 

goto reg2 ; 
l: — bl3; 

bl4 = *d13; 

return; 
} 

/* rptr - display user rp 
« 

* entry - none. 

* uses - a 12, 13,14 

* b 12,13,14 

* cal Is - none. 

* 

* exit - current address set to location 

* containing the user rp . 

rptr( ) 
{ 

bl3 = &*{sp+0) ; 

bi3 =+ 2; 
rpti : b14 = ♦dl 3; 

bl2 =! ALLDIG; 

al2 =& 0362; 

return ; 
} 
/* exec - execute user program 

* entry - bl3 = starting address 

* 

* uses - a 

* b 
♦ 

* Cal Is - none. 



A-10 



* exet - to user program. 

* 

*/ 
exec ( ) 

{ 

20E 44 00 bO = pop( ) ; 

210 C2 FD 02 *(dsp+2) = b13; 

213 45 i^P = P°P( ) • 

214 67 iretjrnO; 

} 
/a 



215 


80 


AF 


7F 


218 


79 


OF 


00 


21B 


28 


A8 




210 


40 


FO 


F9 


220 


44 


00 




222 


80 


CF 


12 


225 


C2 


FD 


02 


228 


82 


BF 


02 80 


22C 


7F 






220 


45 






22E 


67 







ss* " sifT^le step user program 

* entry - bl3 = current address to execute 
* 

* uses - none. 
* 

* Calls - none. 
* 

* exit - None. Interrupt will automatically 

* occure before one user instruction 

* can complete. 
* 

*/ 
sst( ) 
/ 

alO = SSTDEL; 
i: disp(); 

— alO; 

if ( ! neg) goto lb; 
ssto: bO = pop( ) ; 

al2 = 022; 

*(dsp+2) = b13; 

PCIO = 0200; 

nop I ) ; 

rp = pop( ) ; 

i return( ) ; 

} 

/* move - move block of memory 

* 

* entry - b8 * fwa of destination 

* b9 = fwa of source 

* blO = lwa+1 of source 
* 

* uses - a 0,8f9 

* b 8,9 
* 

* calls- none. 

* exit - (b9) to {blO-1) moved to b8. 



*/ 
move( ) 

{ 

22F 01 02 set (zero) ; 

231 FO 9A b9 - blO; 

233 64 01 if (zero) return; 



A-11 



235 87 09 
237 83 80 
239 58 F4 



238 


E8 


00 


23D 


E8 


00 


23F 


E8 


00 


241 


E8 


00 


243 


66 





7C0 4D 63 54 75 74 6F 

7C6 72 20 45 78 65 63 

7CC 20 31 2E 30 OA OD 

7D2 00 



aO = *b9++; 

*b8++ = aO; 

goto move; 
} 
/* shift4 - shift bO left by 4 

* entry - bO = 16-bit number to be shifted 

* logi cal 1y . 

* 

* uses - a 0, 1 

* b 0,1 

* 

* calls - none. 

* 

* exit - bO shifted ^left 4. 

* 

*/ 
shif t4() 
{ 

bO =+ bO; 

bO =+ bO; 

bO =+ bO; 

bO =+ bO; 

return; 
} 
char header [] "McTutor Exec 1.0\n\r''; 



7D3 68 2A 67 73 
7D7 OD OA 21 6C 
7DB 2F 69 72 



char ttty[ ] (' h ','*',' g' , 's ' } 

{ '\r' , '\n' , ' !', '1 ' } 
{ ■/'. 'i'. 'r' }; 



7DE 99 03 8D 02 A9 02 

7E4 20 02 

7E6 9D 03 EB 03 08 03 

7EC 22 03 

7EE 83 02 29 00 99 02 



int ttyf[] { Shalf, Saddr, Snun, SsstO } 

{ «retrn, filinefd, Sunix, Sload } 
{ Araddr, AinitO, Srpoint }; 



/* tty - main teletype controler 

♦ entry - none. 

« 

♦ uses - a 0,7, 10,13, 14 

* b 0,10, 13 

• calls - baud, prstring, rdtty, prtty, ktype 

* 

* exit - none. (it doesn't) 

* 

*/ 
tty() 



A-12 



{ 

244 44 00 bO = pop( ) ; 

246 79 A1 04 baud( ) ; 

249 80 7F 40 a? = 0100; 

24C 80 CF 02 al2 = 02; 

24F 79 76 04 lfcn( ) ; 

252 CO DF CO 07 t3l3 = Sheaden; 

256 79 91 04 pn3tPing(); 

259 C6 OF 02 bl3 = *(dsp + 2); 

25C 79 05 04 prloc( ) ; 

25F 79 C6 04 1 : rdtty( ) ; 

262 98 EF 7F a14 =& 0177; 

265 49 F1 27 00 if (zero) goto reset; 

269 5A C4 04 if (bit(4,al2)) goto 2f: 

26C 79 14 05 prttyO; 

26F BO EF 41 2: al4 - 'A' ; 

272 48 FB OA if (It) goto 3f; 

275 BO EF 5A al4 - 'Z' : 

278 40 F9 04 if (I'lteq) goto 3f; 

27B 90 EF 20 al'' =! 0^*0; 

27E 79 3F 04 3: ktype( ); 

281 58 DC Qo^o ^^' 

} 

/* raddP - set register mode 

* entry - none- 
* 

* uses - a 12,13 

* b none . 

* cal 1 s - none. 
* 

* exit - state bits set up for register 

* operations. 

* 

raddr ( ) 

{ 

283 98 CF 12 al2 =& 022; 

286 90 CF 68 a12 =', 0150; 

289 80 DF AO al3 = A<<4; 

28C 66 return; 

/* addr - '♦' key => set up to input address 

* entry ~ none 

* uses - a 12 

* b 10,13 

* calls- none . 
* 

* exit - current address set to origin of ram 
« and ready to be changed. 

* 
*/ 



A-13 



280 


C6 


AF 


04 


290 


CO 


DA 




292 


98 


CF 


12 


295 


90 


CF 


20 


298 


66 







299 


6F 


DF 


00 


29C 


7D 


OF 


02 


29F 


98 


CF 


12 


2A2 


79 


76 


04 


2A5 


79 


05 


04 


2A8 


66 







2A9 
2AC 



90 CF 80 
66 



addr ( ) 
{ 



} 



bl0 = *(dsp + 4) ; 
b13 = blO; 
al2 =& 022; 
al2 =1 040; 
return; 



7* rpoint - set address to rp 

* entry - none. 

* uses - a 12,13 

* b 13 

* 

* cal Is - 1 fcr, prloc 

* 

* exit - current address set to base of stack 

* which contains the user rp. 

* 

*/ 
rpoint( ) 
{ 

b13 = &*(sp + 0) ; 

bi3 =+ 2; 

al2 =S 022; 

lfcr{); 

pr loc( ) ; 

return; 



} 

/* run - set execute bit in status byte 

* 

* entry - none. 

* uses - a 12 

* b none . 

* 

* ca 1 Is - none. 

« 

* exit - execute bit set so next return 

* will start execution. 

* 

run{ ) 
{ 



al2 =! 0200; 
return ; 



prnum - print 8-bit number on tty 
entry - a9 = number to be printed 
uses - none. 
Calls - prni . 



A-14 



2AD 79 B4 02 
2B0 79 B4 02 
283 66 



* exit - number printed as two hex digits. 

*/ 
prnum( ) 
{ 

prnl { ) : 

prnl { ) ; 

ret urn ; 
} 

/* prnl - print 4-bit number as hex diait 

* ** 

* entry - a9 = upper 4 bits is number to be 



2B4 


34 


91 




2B6 


34 


91 




2BB 


34 


91 




2BA 


34 


91 




2BC 


80 


E9 




2BE 


98 


EF 


OF 


2C1 


80 


EF 


09 


2C4 


48 


F9 


04 


2C7 


A8 


EF 


07 


2CA 


A8 


EF 


30 


2CD 


79 


14 


05 


2D0 


66 







201 98 EF OF 
2D4 52 C3 1C 



» uses - a 9,14 

* b none. 

* cal Is - prtty. 

* 

* exit - digit printed and a9 shifted left 

* by 4. 

* 

prnl ( ) 
{ 

a9 =<« 1 

a9 =<<< 1 

a9 =<<< 1 

a9 =<« 1 

al4 = a9; 

al4 =& 017; 

al4 - 9; 

i f ( 1 teq) goto 1 f; 

al4 a+ ' A ' - ' ' - 10; 
1 : a14 =+ '0 ' ; 

prttyO; 

ret urn ; 
} 

/* tnumb - number input from tty 

* 

* entry - blO = current number being built up 

* a14 X character input 

* uses - a 0,10,12,13,14 

* b 0,10, 13 

* cal Is - Shi f t4. 

* exit - new digit shifted into the right 

* of bio. 

*/ 
tnumb( ) 
{ 

al4 =& 017; 

if { !bi t{3,a12) ) goto 2f ; 



A-15 



2D7 


52 


C6 


10 


2DA 


96 


CF 


BF 


2DD 


BO 


EF 


OB 


2E0 


65 


01 




2E2 


90 


CF 


04 


2E5 


BO 


DF 


BO 


2E8 


66 






2E9 


52 


C5 


07 


2EC 


98 


DF 


FO 


2EF 


90 


DE 




2F1 


66 






2F2 


CO 


OA 




2F4 


79 


38 


02 


2F7 


CO 


AO 




2F9 


98 


AF 


FO 


2FC 


90 


AE 




2FE 


5A 


C5 


05 


301 


90 


CF 


01 


304 


66 






305 


CO 


DA 




307 


66 







308 


82 


BF 


02 01 


30C 


79 


C6 


04 


30F 


98 


EF 


7F 


312 


BO 


EF 


21 


315 


40 


F1 


F5 


318 


22 


BO 


02 


318 


79 


14 


05 


31E 


79 


76 


04 


321 


66 







if ( !bit(6,al2) ) goto If; 

al2 =& 0277; 

al4 - 11 ; 

if ( ! zero) return; 

al2 =! 04; 

al3 = B<<4; 

return; 
1 : if ( !bit(5,al2) ) goto 2f ; 

al3 =& 0360; 

al3 =1 a14; 

return; 
2: bO = blO; 

Shi f t4(); 

biO = bO; 

alO =& 0360; 

alO =1 a14; 

if (bit(5,a12)) goto If; 

al2 =1 1; 

return; 
1 : bl3 = blO; 

return; 

} 

/* Unix - listen to modem 
* 

* entry - none. 
* 

* uses - a 14. 

* b none . 

* calls - rdtty . 

* 

* exit - when a «!' is received from the modem, 

* 

*/ 
uni x( ) • 

{ 

PCIO = 01 ; 
1: rdttyO; 

al4 =& 0177; 

al4 - ' ! ' ; 

if ( ! zero) goto lb; 

PCIO = 0; 

prttyO; 

IfcrO; 

ret urn; 

} 

/• load - load hex file from modem 

* entry - none. 
* 

* uses - a 7.8,9,13,14 

* b 13 
* 

* calls - rdmod, Ifcr, prloc, getbyt. 

* exit - next location that would have been 



A-16 



322 82 BF 02 01 

326 80 7F 20 

329 20 80 

32B 79 OD 05 

32E 98 EF 7F 

331 80 EF 3A 

334 40 F1 F5 

337 79 71 03 

33A 80 9A 

33C 40 F1 10 

33F 22 BO 02 

342 80 7F 40 

345 81 D8 

347 79 76 04 

34A 79 05 04 

34D 66 

34E 79 71 03 

351 80 DA 

353 79 71 03 

356 6A DO 

358 80 DA 

35A 79 71 03 

350 28 98 

35F 48 FO 08 

362 79 71 03 

365 83 DA 

367 58 F4 

369 79 71 03 

36C 48 F1 BD 

36F 58 CE 



371 79 86 03 



load is printed. Only ^:00' is 
printed from the last line of the 
hex file if the load is successful 1 , 
Otherwise there wos a checksum error 
in the last line listed. 



*/ 






1oad( ) 




{ 




PCIO = 01 ; 
a7 = 040; 
a8 = 0; 


1 : 




rd:Mod( ) ; 

a14 =& 0177; 

al4 - ■ : ' ; 

if ( ! zero) goto lb; 

getbytO; 

a9 = alO; 

if O 2et-o) goto 3f ; 


2: 




PCIO = 0; 
a7 = 0100; 
*b13 = a8; 
IfcrO; 
pr 1 oc( ) ; 
return; 


3: 




getbytO; 
a 1 3 = a 1 ; 
getbytO; 
swap(b13) ; 
a13 = alO; 
getbytO; 


3: 




— a9; 

i f ( neg) goto 4f ; 

getbytO; 

*bi3++ = alO; 

goto 3b; 


4: 




getbytO: 

i f ( zero) goto 1 b; 

goto 2b; 


} 








getbyt - accumulate 8-bit byte from 


* 


enti 


ny - none. 


* 


uses - a 8,10 


* 




b none . 


♦ 


cal Is - digit. 


♦ 


exit - alO = byte read 


* 




a8 = current value of check 


*/ 






getbytO 


{ 




digitO; 



Sum. 



A-17 



374 


80 


AE 


376 


79 


86 03 


379 


38 


A1 


37B 


38 


A1 


37D 


38 


A1 


37 F 


38 


A1 


381 


90 


AE 


383 


A8 


8A 


385 


66 





386 


79 


OD 


05 


389 


98 


EF 


7F 


38 C 


80 


EF 


39 


38F 


48 


F9 


04 


392 


A6 


EF 


09 


395 


98 


EF 


OF 


398 


66 







alO = a14; 
digitO; 
alO =« 1 ; 
alO =« 1 ; 
alO =« 1 ; 
alO =« 1 ; 
alO =1 a14; 
a8 =+ alO; 
return; 

} 

/* digit - read hex digit from hex file 
* 

* entry - none. 

* uses - a 14 

* b none . 

* cal Is - rdmod. 
* 

* exit - a14 = binary value of hex digit read 

* 

*/ 
digitO 

{ 

rdmodC ) ; 

al4 =a 0177; 

a14 - '9' ; 

i f ( 1 teq) goto 1 f ; 

al4 =+ 9; 
1 : ai4 =& 017; 

return; 

} 

/* half - set half duplex mode 
* 

* entry - none. 

* uses - a 12 

* b none . 
* 

* cal Is - none. 

* exit - bit set in ai2 to indicate no echoing 

* of input. 



*/ 
half ( ) 

{ 
399 88 CF 10 al2 =~ 020; 

39C 66 return; 

} 

retrn( ) 

{ 

39D 79 33 04 regad( ); 

3A0 79 IF 04 store(); 

3A3 80 EF OA al4 = '\n' ; 

3A6 79 14 05 prtty(); 



A-18 



3A9 
3AC 
3AF 
3B2 
3B4 

on** 

OO / 

3B9 
3BC 
3BF 
3C1 
3C4 
3C6 
3C9 
3CC 
3CF 
3D1 
3DA 
3D6 
3D9 
3DB 
3DE 
3Et 
3E3 
3E4 
3E7 
3E9 



52 C7 04 

59 OE 02 
52 C3 33 
80 CD 

5A C5 03 
28 00 
98 OF OF 
98 DF FO 
90 DO 

79 82 04 

80 90 

79 AD 02 
79 11 05 
79 33 04 
C5 90 
52 C2 08 
6A 90 
79 AD 02 
6A 90 
79 AD 02 
79 11 05 

60 AO 
66 

5A C5 1C 
68 DO 
58 17 



if ( !bit(7,a12) ) goto if; 

goto exec; 
1 : i f ( !bi t(3,a12) ) goto 2f ; 

30 = 3l3; 

if (bit(5,al2)) goto retO; 

■t-t-aO ; 
reto: aO =& 017; 

al3 =& 0360; 

al3 =! aO; 

crdel ( ); 

a9 = al3; 

prnum( ) ; 

prsp( ) ; 

regacl( ) ; 

b9 = *dO; 

if ( !bit(2,a12) ) goto If; 

swap(b9) ; 

prnum( ) ; 

sw3p(b9) ; 
1 : prnum( ) ; 

prsp( ) ; 

bio = 0; 

return; 
2: if (bit(5,al2)) goto Infl; 

++bl3; 

goto Infl ; 



i 

/* 

* 



Hnefd - print previous location 

entry - bl3 = current address 

alO = possible value to store in 
current address. 

uses - a 8,9,10,13,14 
b 9,10, 13 



* Calls - store, prtty, prnum, prsp. 

* 

* exit - any pending values are stored in 

* the location if necessary and 

* the previous location is displayed 



3EB 


79 


33 


04 


3EE 


79 


IF 


04 


3F1 


80 


EF 


00 


3F4 


79 


14 


05 


3F7 


52 


C3 


07 


3FA 


80 


OD 




3FC 


28 


08 




3FE 


58 


89 




400 


68 


D8 




402 


79 


82 


04 


405 


CO 


SD 





*/ 




1 inefd( ) 


{ 






regad( ) ; 




storc( ) ; 




al4 = '\r ' ; 




prtty( ); 




if ( !bi t(3,a12) ) goto 1 f ; 




aO = ai3; 




— aO; 




goto retO; 


1 : 


— bl3; 


Infl : 


crdel ( ) ; 


pr loc : 


b9 = b13; 



A-19 



407 


6A 


90 




409 


79 


AD 


02 


40C 


6A 


90 




40E 


79 


AD 


02 


411 


79 


1 1 


05 


414 


85 


9D 




416 


79 


AD 


02 


419 


79 


11 


05 


41C 


60 


AO 




41E 


66 







41F 


52 


CO 


OF 


422 


52 


C3 


OA 


425 


81 


OA 




427 


52 


C2 


07 


42A 


CI 


OA 




42C 


58 


02 




42E 


81 


DA 




430 


60 


AO 




432 


66 







swap(b9) ; 
prnum( ) ; 
swap(b9) ; 
prnum( ) ; 
prsp( ); 
a9 = *bl3; 
prnum( ) ; 
prsp( ): 
bio = 0; 
return; 



} 

/* store - store value in current location 
* 

* entry - bO = register address if necessary 

* bl3 = current address 

* alO = value to be stored there 



* uses - a 10,12,13 

* b 10,13 

* cal Is - none. 



♦ 

* exit - if necessary, value stored in current 

* location and status updated to 
indicate no value to be stored. 



*/ 
store( ) 

{ 



1 : 
2: 



if ( Ibi t(0,al2) ) goto 2f ; 

if ( !bi t(3,a12) ) goto If, 

♦bO = alO; 

if ( !bi t(2,a12) ) goto 2f : 

*dO = blO; 

goto 2f; 

*b13 = alO; 

bio = 0; 

return ; 



/* regad - calculate user register address 
« 

* entry - al3(0-3) = register number 

* ♦(dsp+4) = user register pointer 
* 

* uses - a 

* b 
* 

* ca 1 1s - none. 

* exit - bO = address of desired register. 



433 80 OD 

435 D8 OF OF 00 



rcgad( ) 
{ 



aO - al3; 
bO =& 017; 



A-20 



439 38 01 aO =« 1 ; 

43B EE OF 04 bO =+ *(dsp + 4); 

43E 66 return; 

/ 

/* ktype - determine key type 



43F 


BO 


EF 


30 




442 


48 


F8 


08 




445 


80 


EF 


39 




448 


49 


F9 


D1 


02 


44C 


BO 


tF 


61 




44F 


48 


F8 


OD 




452 


BO 


EF 


66 




455 


40 


F9 


07 




458 


A8 


EF 


09 




458 


59 


D1 


02 




45E 


CO 


IF 


D3 


07 


462 


CO 


2F 


DC 


07 


466 


7D 


2F 


02 




469 


87 


01 






468 


64 


01 






46D 


80 


OE 






46 F 


40 


F1 


F5 




472 


C5 


22 






474 


49 


2F 







* entry - al4 = ascii character input 

* 

* uses - a 0,1,2,14 

* b 1 ,2 

* 

* Calls - space, addn , go, retnn, linefd, unix 

* load, tnumb. 

* 

* exit - to appropriate processing routine. 

* In the case of * tnumb' characters 

* »a' - »f' are converted into easy 

* to convert values. 

*/ 
ktype( ) 

{ 

al4 - '0' ; 

if (It) goto 1f ; 

al4 - '9' ; 

if (1 teq) goto tnumb; 
1 : a14 - 'a' ; 

if (It) goto 1 f ; 

al4 - ' f ' ; 

if ( ! 1 teq) goto 1 f ; 

al4 =+ 9; 

goto tnumb; 
1 : bl = Sttty; 

b2 = Sttyf - 2; 
1 : b2 =+ 2; ■ 

aO = ♦b1++; 

if (zero) retur^n; 

aO - a14; 

if ( ! zero) goto lb; 

b2 = *d2; 

goto ♦b2; 
} 

/* 1 f cr - output linefeed and carriage return 
♦ 

* entry - none. 
♦ 

* uses - a 0,14 

* b none . 

* 

* calls - prtty, bitime 

* 

* exit - carriage moved to new line and delay 

* done to allow time for this.' 

* 

IfcrO 



A-21 



476 


80 


EF 


OA 


479 


79 


14 


05 


47C 


80 


EF 


00 


47F 


79 


14 


05 


482 


98 


CF 


9E 


485 


80 


OF 


32 


488 


79 


59 


01 


488 


28 


08 




480 


40 


F1 


F9 


490 


66 







491 


87 


EO 






493 


64 


01 






495 


79 


14 


05 




498 


BO 


EF 


00 




498 


69 


F1 


82 


04 


49F 


58 


FO 







4A1 


82 


BF 


03 


92 


4A5 


C5 


OF 


FE 


IB 


4A9 


65 


01 






4AB 


58 


86 


14 




4AE 


53 


86 


FE 




481 


70 


OF 


03 




484 


80 


5F 


02 




487 


80 


55 







{ 

a14 = '\n' ; 

pnttyO; 
prcr : al4 = '\p ' ; 

prttyO; 
crdel : ai2 =& 0236; 

aO = NBIT; 
1 : b i t i me ( ) ; 

— aO; 

1 f ( Izero) goto lb; 

return; 

} 

/* prstring - print out »\0' terminated string 

* 

* entry - bl3 = pointer to string. 

* 

* uses - a 13, 14 

* b 13 
* 

* calls - prtty, crdel. 

* exit - string printed out on terminal. 

*/ 
prstr ing( ) 

{ 

1 : al4 = ♦b13++; 

if (zero) return; 

prttyO; 

al4 - '\r' ; 

i f ( zero) crdel { ) ; 

goto lb; 

} 

/* baud - determine baud rate of terminal 
* 

* entry - BAUD = => baud rate unKnown 
* 

* uses - a 0,5 

* b 

* ca 1 Is - none. 
* 

* exit - BAUD contains delay count that enables 

* bitime to wait one bit time. 

* 

*/ 
baud ( ) 

{ 

PCNTRL = 0222; 

bO = BAUD; 

if ( ! zero) return; 

if (bit(6,PAI0) ) goto 3f ; 
1 : if ( !bit(6,PAlO)) goto lb; 
1 : bO =+ 3; 

a5 = 2; 

a5 = a5; 



A-22 



4B9 


28 


58 




4BB 


40 


FO 


FC 


4BE 


5B 


B6 


F1 


4C1 


CI 


FO 


FE IB 


4C5 


66 







4C6 


20 


10 




4C8 


20 


EO 




4CA 


86 


6B 


02 


4CD 


82 


BF 


03 92 


4D1 


82 


B6 


02 


4D4 


85 


OB 




4D6 


98 


07 




408 


88 


01 




4DA 


48 


F1 


F8 


4DD 


C5 


5F 


FE IB 


4E1 


03 


08 




4E3 


6A 


50 




4E5 


3C 


5F 




4E7 


6A 


50 




4E9 


3C 


5F 




4EB 


79 


50 


01 


4EE 


80 


6F 


09 


4F1 


28 


68 




4F3 


48 


F1 


14 


4F6 


79 


59 


01 


4F9 


38 


EF 




4FB 


85 


OB 




4FD 


98 


07 




4FF 


88 


01 




501 


40 


n 


EE 


504 


90 


EF 


80 


507 


58 


E8 




509 


79 


59 


01 


50C 


66 







2: — a5; 

i f ( !neg) goto 2b; 

if (bit(6,PAI0) ) goto lb; 
3: BAUD = bO; 

return; 
} 

/* rdtty - read character from tty 
* 

* entry - none. 

* uses - a 0,1,5,6,14 

* b 5 

* 

* calls - delay, bitime. 

* 

* exit - a14 = character read 

* 

rdtty( ) 
{ 

a1 = 0; 
rdto: al4 = O; 

a6 = PCIO; 

PCNTRL = 0222; 

PCIO = a6; 
1 : aO = PAID; 

aO =S a7; 

aO =" ai ; 

i f { zero) goto 1 b; 

b5 = BAUD; 

clear (carry) ; 

swap(b5) ; 

a5 =>>$ 1 ; 

swap( b5) ; 

a5 -->>$ 1 ; 

de 1 a y ( ) ; 

a6 = 9; 
1 : — a6; 

if (zero) goto 2f; 

bit 1 me ( ) ; 

a14 =>> 1 ; 

aO = PAID; 

aO =& a7; 

aO =' al ; 

i f ( ! zero) goto lb; 

al4 r! 0200; 

goto 1b; 

bi t irr,e( ) ; 

return; 



2: 

} 

/* rdmod - read character from modem 

* 

* entry - none. 

* uses - a 1 . 

* b none . 



A-23 



500 
50 F 



80 17 
58 87 



511 
514 
517 
518 
51E 
520 
523 
526 
529 
52C 
52E 
530 
532 
535 
537 
53A 
53D 
540 



80 EF 20 
86 68 02 
82 BF 03 82 
82 86 02 
21 80 

79 59 01 

80 6F 08 

80 OF 20 
5A EO 03 
20 00 

34 EF 
61 BO 
79 59 01 
28 68 
40 F1 

81 BF 20 
79 59 01 
66 



ED 



* cal Is - rdtty. 

* 

* exit - through rdtty. a14 » character read. 

*/ 
rdmod( ) 

{ 



a1 = a7; 
goto rdtO; 



/• prtty - print character to tty. 

* entry - al4 » character to be printed 

* 

* uses - a 0,6, 14 

* b none . 

* calls - bi t ime. 

* exit - character written out to terminal 

* 

*/ 
prsp( ) 

{ 

al4 = ' ' ; 

prtty: a6 = PCIO; 

PCNTRL = 0202; 

PCIO = a6; 

PAID = 0; 

bi t ime( ) ; 

a6 = 8; 
1 : aO = 040 ; 

if (bit(0,al4)) goto 2f; 

aO = 0: 
2: al4 =>» 1 ; 

PAIO = aO; 

bi t ifTie( ) ; 

— a6; 

if ( ! zero) goto lb; 

PAIO = 040; 

bi t ime( ) ; 

return; 



prom - write a prom 

entry - b9 = starting address 

uses - a 1,7,12 
b none . 

calJs - verify, zapall. 

exit - 1024 bytes starting at b9 are written 
out, then the prom is verified to 



A-24 



541 


82 


BF 


03 


90 


545 


82 


BF 


07 


80 


549 


80 


7F 


6E 




54C 


79 


38 


05 




54 F 


28 


78 






551 


40 


F1 


F9 




554 


79 


78 


05 




557 


22 


80 


02 




55A 


OD 


OF 


88 


IB 


55E 


C2 


FF 


03 


35 00 


563 


22 


FO 


02 




566 


C2 


FF 


00 


00 18 


56B 


47 








56C 


4D 


OF 


EO 


IB 


570 


C5 


DF 


DA 


IB 


574 


C5 


EF 


DC 


IB 



578 59 60 00 



} 

/* 



see that everything was written out 
correctly. If everything is OK the 
address displayed will be 400. 



* 




*/ 




n/-.m/ \ 




. wi.i V / 






PCNTRL = SETMOD [ AI 




OCNTRL = SETMOD; 




a7 = 110; 


: 


zapa i 1 ( ) ; 




— a7; 




if ( i zero) goto lb; 




ver i f y( ) ; 


etd: 


PCIO = 0; 




sp = USERRG - 2 - 1 




*(dsp +3) = Sini t; 




*(sp +2) =0; 




*(dsp + 0) = RAMQRG; 




pu3h( rp) ; 




rp = SYSREG; 




bl3 = USERB13; 




bl4 = USERB14; 




goto man2 ; 



- 2; 



verify - verify information in prom 



* entry - al2(4) = zero/data verify 

* b9 = starting address for data verify 

* 

* uses - a 0,1,3,4,9,13,14 

* b , 9 , 1 3 

* 

* ca 11 s - none. 

* 

* exit - i f no errors then return. If error 

* then return one level up and set 

* b13 to prom address in error, 

* b14(l5-8) to prom data, and 

* b14(7-0) to expected data. 



57B 


60 


DO 






57D 


20 


30 






57F 


80 


4F 


20 




582 


82 


BF 


03 


90 


586 


82 


BF 


07 


98 


58A 


82 


84 


02 




58D 


CO 


5F 


FF 


3F 


591 


79 


5D 


01 




594 


82 


83 


01 




597 


82 


84 


02 




59A 


86 


EB 


04 




590 


87 


19 







*/ 






ver i f 


y() 




{ 








bl3 : 


= 0; 




a3 = 


0; 




a4 = 


040; 




PCNTRL = 0220; 




OCNTRL = 0233; 




PCIO 


= a4; 




b5 - 


0x3f f f ; 




del .iy( ) ; 


1 : 


PE3I0 


= a3; 




PCIO 


= a4; 




al4 -. 


= PDIO: 




al = 


*b9++; 



A-25 



59F 


BO 


IE 




5A1 


48 


F1 


07 


5A4 


6A 


EO 




5A6 


80 


El 




5A8 


58 


AD 




5AA 


68 


DO 




5AC 


28 


30 




5AE 


40 


F1 


E4 


5B1 


A8 


4F 


02 


5B4 


BO 


4F 


28 


5B7 


48 


F8 


DB 


5BA 


66 







2: 



al - a14; 

if (zero) goto 2f; 

swap(b14) ; 

al4 = al ; 

goto retd; 

++bl3; 

•f+aS; 

if ( ! zero) goto lb; 

34 =+ 02; 

a4 - 050; 

if (It) goto lb; 

return; 

zapall - write all locations in prom 

entry - b9 = starting address to write 

uses - a 0,3,4,5,13 
b 5,13 

cal Is - none. 

exit - all locations of the prom hit with a 
1 msec, write pulse. 



5BB 


CO 


09 




5BD 


20 


30 




5BF 


20 


40 




5C1 


87 


00 




5C3 


82 


83 


01 


5C6 


82 


84 


02 


5C9 


82 


BO 


04 


5CC 


88 


4F 


40 


5CF 


82 


B4 


02 


5D2 


CO 


5F 


tC 00 


5D6 


79 


5D 


01 


5D9 


88 


4F 


40 


5DC 


82 


B4 


02 


5DF 


28 


30 




5E1 


40 


F1 


DE 


5E4 


A8 


4F 


02 


5E7 


BO 


4F 


08 


SEA 


48 


F8 


05 


5ED 


66 







z 


apa 1 1 ( ) 






{ 










bl3 » b9; 






a3 = 


0; 






a4 = 


0; 




1 


: aO = 


♦bi3++: 






PBIO 


= a3; 






PCIO 


= a4; 






PDIO 


s aO; 






a4 =' 


" 0100; 






PCIO 


= a4; 






b5 = 


28; 






delayO; 






a4 ^' 


• 0100; 






PCIO 


= a4; 






++a3 








if ( 


zero) goto lb; 




a4 =+ 02; 






a4 - 


010; 






if (It) goto 


lb; 




return; 





loadt - load file fpom tape 

entry - a8 « file id 

b9 = fwa of load 

uses - a 1,3,7,8,9,12,13,14 
b 13 



A-26 



* calls - rdbit, rdchan, rdbyte, rdnib 

* exit - file with matching id from tape 

* loaded into ram. 

1 oadt ( ) 

{ 

BEE 82 BF 03 90 PCNTRL = SETMOD | AINP; 

5F2 82 BF 07 00 OCNTRL = SETMOD; 

5F6 CO D9 b13 = b9; 

5F8 98 CF IF al2 =« 037; 

5FB 80 98 a9 = a8; 

5FD 40 FB OA if (ihomog) goto If; 

600 90 CF 20 al2 =! 040; 

603 48 F1 04 if (zero) goto If; 

606 90 CF 40 al2 =| 0100; 

609 82 BC 04 1: PDIO = a12; 

60C 79 B2 06 sync: rdbit(); 

60F 38 t F a1 =>> 1 ; 

611 90 10 a1 =1 aO; 

613 BO IF 16 a1 - SYNC; 

616 40 F1 F4 if (Izero) goto sync J 

619 80 3F OA a3 = 10; 

61C 79 8B 06 1 : rdchar( ) ; 

61 F BO IF 16 a1 - SYNC; 

622 40 F1 E8 if (Izero) goto sync; 

o2S 28 3S — — a3; 

627 40 F1 F3 if (Izeno) goto lb; 

62A 79 8B 06 l: rdchan(); 

62D 80 IF 2A al - STaRTCH; 

630 48 F1 09 if (zero) goto If; 

633 BO IF 16 al - SYNC; 

636 40 F1 D4 if (!zero) goto sync; 

639 58 EF goto lb; 

638 CO 8F 2A 00 l: b8 = CHECKSUM; /* initialize check sum character ♦/ 

63F 79 72 06 rdby te( ) ; 

642 5A C5 06 if {bit(5,al2)) goto If; /* accept anything */ 

645 80 79 a7 - a9; 

647 40 F1 C3 if (!zoro) goto sync; /* wrong id */ 

64A 79 72 06 1 : rdbyte( ) ; 

64D 6A 70 swap(b7); 

64F 79 72 06 rdbyte( ) ; 

652 6A 70 swap(b7) ; 

654 5A C6 03 if (bit{6,al2)) goto If; /* ignore addr on tape */ 

657 CO D7 bl3 = b7: 

659 79 88 06 1 : rdchar( ) ; 

65C BO IF 2F al - ENOCH; 

65F 48 F1 08 if (zero) goto If; 

662 79 75 06 rdnib( ); 

665 83 D7 *b13++ = a7 ; 

667 58 FO goto 1b; 

669 79 88 06 1: rdchar(); 

66C CO E8 bl4 = bfi; 

66E 98 EF 7F al4 =& 0177; 

671 66 return; 



A-27 



} 

/• rdbyte - read 8-bit byte from tape 



* 



672 


79 


8B 


06 


675 


98 


IF 


OF 


678 


80 


71 




67A 


38 


71 




67C 


38 


71 




67E 


38 


71 




680 


38 


71 




682 


79 


88 


06 


685 


98 


IF 


OF 


688 


90 


71 




68A 


66 







688 


80 


2F 


08 


68E 


79 


82 


06 


691 


38 


IF 




693 


90 


10 




695 


28 


28 




697 


40 


F1 


F5 


69A 


82 


81 


04 


69D 


88 


81 




69F 


80 


01 




6A1 


98 


IF 


7F 


6A4 


OE 


00 




6A6 


88 


OF 


01 


6A9 


D8 


OF 


01 00 


6AD 


6A 


00 





entry - none. 



* uses - a 1 ,7 

• b none . 

* Calls - rdchar. 

* 

• exit - a7 = 8-bit byte assembled from 2 pseudo 

• asci i characters on the tape. 

1^ 

*/ 
rdbyte( ) 
{ 

rdchar( ) ; 
rdnib: a1 =& 017; 

a7 = a1; 

a7 =<< 1 ; 

a7 =<< 1 ; 

a7 =<< 1 ; 

a7 =<< 1 ; 

rdchar ( ) ; 

al =& 017; 

a7 =1 al ; 

return; 
} 

/• rdchar - read pseudo ascii character from tape 
* 

♦ entry - none. 

* uses - a 1,2,8 

* b none. 

* 

♦ cal Is - rdbi t . 

* exit - al « Character read from tape. 

* 

*/ 
rdchar( ) 
{ 

a2 » 8; 
1 : rdbi t(); 

al =>> 1 ; 

al =1 ao; 

—a 2; 

if ( ! zero) goto lb; 

PDIO = al ; 

a8 =" al ; 

aO - al ; 

al =4 0177; 

aO = bi tsum(aO) ; 

aO =" 1; 

bO =4 1; 

swap(bO) ; 



A-28 



6AF E8 80 be =+ bO; 

6B1 66 return; 



6B2 


20 


00 




6B4 


53 


87 


FE 


6B7 


28 


00 




6B9 


5B 


87 


FC 


BBC 


BO 


OF 


20 


6BF 


48 


FA 


F1 


6C2 


98 


OF 


80 


6C5 


66 







6C6 


82 


BF 


03 


80 


6CA 


82 


BF 


07 


80 


6CE 


CO 


D9 






6D0 


CO 


1F 


64 


18 


6D4 


6A 


10 






606 


79 


31 


07 




6D9 


6A 


10 






6DB 


28 


18 






6DD 


40 


F1 


F5 




6E0 


20 


90 







} 

/* ndbit - read a bit from the tape 



* 



entry - none. 



* uses - a 

* b none . 

* 

* calls - none. 

* exit - a0(7) = bit read. 

* 

* note - the loop at '2' is very time critical 

* and dependant upon the way outbit puts 

* out bits. 

* 

*/ 
rdbitO 
{ 

aO = 0; 
1: if ( !bi t(7,PAlO) ) goto lb; 
5: ++a0; 

if (bit(7,PAlO) ) goto 2b; 

if (llteq) goto rdbi t ; 

aO =& 0200; 

return; 
} 

/* dumpt - dump file to tape 
* 

* entry - a8 = file id 

* b9 = fwa to dump 

* blO = lwa+1 to dump 
* 

* uses - a 1,4,7,9,10,13 

* b 7,13 

* 

* calls - outch, outbyte 
* 

* exit - fwa to Iwa stored on tape 



*/ 
dumpt ( ) 

{ 



PCNTRL = SETMOD; 

OCNTRL = SETMOD; 

bl3 = b9; 

b1 = SYNC<<8 ! 100; 

swap(bi ) ; 

outch( ) ; 

swap(bi ) ; 

— al ; 

if ( ! zero) goto lb; 

a9 = 0; 



A-29 



6E2 


80 


IF 


2A 


6E5 


79 


31 


07 


6E8 


80 


78 




6EA 


79 


1A 


07 


6ED 


CO 


7D 




6EF 


79 


1A 


07 


6F2 


6A 


70 




6F4 


79 


1A 


07 


6F7 


01 


02 




6F9 


FO 


AD 




6FB 


48 


F1 


08 


6FE 


87 


70 




700 


79 


1A 


07 


703 


58 


F2 




705 


80 


IF 


2F 


708 


79 


31 


07 


70B 


80 


19 




700 


79 


33 


07 


710 


80 


IF 


04 


713 


79 


31 


07 


716 


79 


31 


07 


719 


66 







71A 79 21 07 
710 79 21 07 
720 66 



a1 = STARTCH; 

outch( ) ; 

a7 = a8; 

outbyte( ) ; 

b7 = bl3; 

outbyte( ) ; 

swdp(b7) ; 

outbyte( ) ; 
1 : set ( zero) ; 

bio - bl3; 

if (zero) goto If; 

a7 = *b13++; 

outbyte( ) ; 

goto lb; 
i: a1 = ENOCH; 

outch( ) ; 

al s a9; 

outchar( ) ; 

al = EOT; 

outch( ) ; 

outch( ) ; 

return; 

} 

/* outbyto - output one 8-bit byte to tape 

* 

* entry - a7 = byte to be written 

* uses - none. 

* calls - out4. 
* 

* exit - a7 written out as two pseudo ascii 

* characters and contents of a7 unchanged. 

« 

*/ 
outbyteC ) 

{ 

Out4(); 
out4( ); 
return; 



out4 - output 4-bit nibble as pseudo ascii 

character, 
outch - output asci i character 

entry - a7 = 4-bit nibble to be written out (out4) 
al » ascii character to output (outch) 

uses - a 0,1,2,4,7,9 
b 

cal Is - outbi t . 

exit - one ascii character written to tape. 



A-30 



721 


34 


71 




723 


34 


71 




725 


34 


71 




727 


34 


71 




729 


an 


1 7 




728 


98 


IF 


OF 


72E 


90 


IF 


30 


731 


88 


91 




733 


82 


81 


04 


736 


OE 


01 




738 


98 


OF 


01 


73S 


88 


OF 


01 


73E 


34 


OF 




740 


90 


10 




742 


80 


4F 


08 


745 


CO 


OF 


OC 18 


749 


34 


IF 




748 


48 


FO 


05 


74E 


CO 


OF 


OC OC 


752 


80 


2F 


OD 


755 


79 


66 


07 


758 


80 


2F 


06 


758 


6A 


00 




75D 


79 


66 


07 


760 


28 


48 




70 


Af\ 


C 1 


e 1 



765 66 



out4( ) 

{ 

a7 =<« 1 ; 

a7 =<« 1 ; 

a? =<<< 1 ; 

a7 =<« 1 ; 

3 1 - 3 » i 

a1 =& 017; 

al =1 '0' : 
outch: a9 =' al ; 
outchar :POIO = al ; 

aO = o\ tsum(a1 ) ; 

aO =& 1 ; 

aO =" 1 ; 

aO =>>> 1 ; 

ai =1 aO; 

a4 s 8: 
1 : bO = BIT1 ; 

al =>» 1 ; 

i f ( neg) goto 2f ; 

bO = BITO; 
2: a2 = CYCLEO; 

outbi t ( ) ; 

a2 = CYCLE1 ; 

swap(bO) ; 

outbi t() ; 

— a4; 

if (l^erO) goto lb; 

return ; 
} 

/* outbit - output stream of bits to tape 
* 

* entry - aO = twice the number of 1 bits desired 

* a2 = length of each 1 bit 

* 

* uses - a 0,3,5 

* b none . 

* cal Is - none. 

* 

* exit - a square wave of proper frequency and 

* length is written to the tape. 



766 


20 


30 




768 


88 


3F 


10 


768 


81 


83 




76D 


80 


52 




76F 


28 


58 




771 


40 


FO 


FC 


774 


28 


08 




776 


40 


F1 


FO 


779 


66 







*/ 

outbi t( ) 
{ 



a3 = 0; 
a3 =' 020; 
PAID = a3; 
a5 = a2; 

— a5; 

i f ( !neg) goto 2b; 

— aO; 

if ( ! zero) goto lb; 

ret urn ; 



A-31 



* 



powon - delay for power on 

entry - none. 

uses - a 5 
b 5 



* cal Is - reset . 
* 

* exit - Delay done to enable any transient 

* interrupts caused by the noisy 

* transformop to disappear. This 

* routine had to be encoded into 

* the data section since it is a patch 

* that must be at the very end of the 
4> executive* 

*/ 



7F4 


CO 


5B 




7F6 


68 


58 




7F8 


40 


FO 


FC 


7FB 


59 







7FC 27 00 



7FE CD 05 



char poMon[ ] 

{ OxcO, 0x5b } 

{ 0x68, 0x58 } 

{ 0x40, OxfO, Oxfc } 

{ 0x59 ); 

int powr preset; 

char unused[ ] 

{ Oxcd. 0x05}; 



/♦ b5 = bll ; ♦/ 

/* i: — b5; */ 

/* if (!neg) goto lb; */ 

/♦ goto reset; ♦/ 



**« 


SYMBOL TABLE 


IBFEa 


- 


BAUD 


1F03a 


- 


PCNTRL 


1F07a 


- 


OCNTRL 


IFOOa 


- 


PAID 


IFOIa 


- 


PBIO 


1F02a 


- 


PCIO 


1F04a 


- 


PDIO 


77AD 


- 


tfmt 


7BAD 


- 


tnum 


7A6D 


- 


tfnc 


OT 


- 


main 


27t 


- 


reset 


29t 


- 


ini to 


35 1 


- 


ini t 


60 1 


- 


man2 


8Bt 


- 


L. . .0001 


90 1 


- 


L. . .0003 


ACT 


- 


rdkey 


DFT 


- 


disp 


107T 


- 


dsp4 


112T 


- 


dsp2 


13At 


- 


dp21 


156t 


- 


dp22 



A-32 



159T 


- 


bi t ime 


15DT 


- 


delay 


165T 


- 


numb 


179t 


- 


L= - .0005 


18At 


- 


L. . .0006 


4 004- 
1 WU L 


- 


chreg 


197t 


- 


L. . .0007 


19Ft 


- 


L. . .0008 


1A7T 


- 


areg 


1B3t 


- 


reg1 


1B5t 


- 


reg2 


1C3T 


- 


breg 


1D1T 


- 


star 


1DET 


- 


equal 


1E2T 


- 


plus 


1F0T 


- 


mi nus 


1FET 


- 


nptr 


204t 


- 


rpt1 


20ET 


- 


exec 


215T 


- 


sst 


220t 


- 


sstO 


22FT 


- 


move 


23BT 


- 


Shi ft4 


7C0D 


- 


header 


7D3D 


- 


ttty 


7DED 


- 


ttyf 


244T 


- 


tty 


283T 


- 


raddn 


28DT 


- 


addn 


299T 


- 


rpoint 


2A9T 


- 


run 


2ADT 


- 


pnnum 


2B4T 


- 


prni 


2D1T 


- 


tnumb 


308T 


- 


uni X 


322T 


- 


load 


371T 


- 


getbyt 


386T 


- 


digit 


399T 


- 


half 


39DT 


- 


retrn 


3B9t 


- 


retO 


3EBT 


- 


1 i nef d 


402t 


- 


Inf 1 


405T 


- 


price 


41FT 


- 


store 


433T 


- 


regad 


43FT 


- 


ktype 


476T 


- 


Ifcr 


47Ct 


- 


pncr 


482T 


- 


crdel 


491T 


- 


prs t r i ng 


4A1T 


- 


baud 


4C6T 


- 


rdtty 


4C8t 


- 


rdtO 


50DT 


- 


rdmod 


511T 


- 


prsp 



A-33 



514T - 
541 T - 
557t - 
578T - 
5BBT - 
BEET - 
60Ct - 
672T - 
675T - 
68BT - 
6B2T - 
6C6T - 
71AT - 
721 T - 
731 T - 
733T - 
766T - 
7F4D - 
7FCD - 
7 FED - 



prtty 

prom 

petd 

verify 

zapai I 

loadt 

sync 

rdbyte 

rdnib 

rdchar 

rdbit 

dumpt 

outbyt* 

out 4 

outch 

outchar 

outbit 

powon 

powp 

unused 



A-34